stm32f1/stm32f107/i2c1/
sr2.rs

1///Register `SR2` reader
2pub type R = crate::R<SR2rs>;
3///Field `MSL` reader - Master/slave
4pub type MSL_R = crate::BitReader;
5///Field `BUSY` reader - Bus busy
6pub type BUSY_R = crate::BitReader;
7///Field `TRA` reader - Transmitter/receiver
8pub type TRA_R = crate::BitReader;
9///Field `GENCALL` reader - General call address (Slave mode)
10pub type GENCALL_R = crate::BitReader;
11///Field `SMBDEFAULT` reader - SMBus device default address (Slave mode)
12pub type SMBDEFAULT_R = crate::BitReader;
13///Field `SMBHOST` reader - SMBus host header (Slave mode)
14pub type SMBHOST_R = crate::BitReader;
15///Field `DUALF` reader - Dual flag (Slave mode)
16pub type DUALF_R = crate::BitReader;
17///Field `PEC` reader - acket error checking register
18pub type PEC_R = crate::FieldReader;
19impl R {
20    ///Bit 0 - Master/slave
21    #[inline(always)]
22    pub fn msl(&self) -> MSL_R {
23        MSL_R::new((self.bits & 1) != 0)
24    }
25    ///Bit 1 - Bus busy
26    #[inline(always)]
27    pub fn busy(&self) -> BUSY_R {
28        BUSY_R::new(((self.bits >> 1) & 1) != 0)
29    }
30    ///Bit 2 - Transmitter/receiver
31    #[inline(always)]
32    pub fn tra(&self) -> TRA_R {
33        TRA_R::new(((self.bits >> 2) & 1) != 0)
34    }
35    ///Bit 4 - General call address (Slave mode)
36    #[inline(always)]
37    pub fn gencall(&self) -> GENCALL_R {
38        GENCALL_R::new(((self.bits >> 4) & 1) != 0)
39    }
40    ///Bit 5 - SMBus device default address (Slave mode)
41    #[inline(always)]
42    pub fn smbdefault(&self) -> SMBDEFAULT_R {
43        SMBDEFAULT_R::new(((self.bits >> 5) & 1) != 0)
44    }
45    ///Bit 6 - SMBus host header (Slave mode)
46    #[inline(always)]
47    pub fn smbhost(&self) -> SMBHOST_R {
48        SMBHOST_R::new(((self.bits >> 6) & 1) != 0)
49    }
50    ///Bit 7 - Dual flag (Slave mode)
51    #[inline(always)]
52    pub fn dualf(&self) -> DUALF_R {
53        DUALF_R::new(((self.bits >> 7) & 1) != 0)
54    }
55    ///Bits 8:15 - acket error checking register
56    #[inline(always)]
57    pub fn pec(&self) -> PEC_R {
58        PEC_R::new(((self.bits >> 8) & 0xff) as u8)
59    }
60}
61impl core::fmt::Debug for R {
62    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
63        f.debug_struct("SR2")
64            .field("pec", &self.pec())
65            .field("dualf", &self.dualf())
66            .field("smbhost", &self.smbhost())
67            .field("smbdefault", &self.smbdefault())
68            .field("gencall", &self.gencall())
69            .field("tra", &self.tra())
70            .field("busy", &self.busy())
71            .field("msl", &self.msl())
72            .finish()
73    }
74}
75/**Status register 2
76
77You can [`read`](crate::Reg::read) this register and get [`sr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
78
79See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F107.html#I2C1:SR2)*/
80pub struct SR2rs;
81impl crate::RegisterSpec for SR2rs {
82    type Ux = u16;
83}
84///`read()` method returns [`sr2::R`](R) reader structure
85impl crate::Readable for SR2rs {}
86///`reset()` method sets SR2 to value 0
87impl crate::Resettable for SR2rs {}
stm32f1/stm32f107/i2c1/sr2.rs

stm32f1/stm32f107/i2c1/
sr2.rs
