stm32f1/stm32f107/fsmc/
pmem.rs

1///Register `PMEM%s` reader
2pub type R = crate::R<PMEMrs>;
3///Register `PMEM%s` writer
4pub type W = crate::W<PMEMrs>;
5///Field `MEMSET` reader - MEMSETx
6pub type MEMSET_R = crate::FieldReader;
7///Field `MEMSET` writer - MEMSETx
8pub type MEMSET_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9///Field `MEMWAIT` reader - MEMWAITx
10pub type MEMWAIT_R = crate::FieldReader;
11///Field `MEMWAIT` writer - MEMWAITx
12pub type MEMWAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13///Field `MEMHOLD` reader - MEMHOLDx
14pub type MEMHOLD_R = crate::FieldReader;
15///Field `MEMHOLD` writer - MEMHOLDx
16pub type MEMHOLD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17///Field `MEMHIZ` reader - MEMHIZx
18pub type MEMHIZ_R = crate::FieldReader;
19///Field `MEMHIZ` writer - MEMHIZx
20pub type MEMHIZ_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22    ///Bits 0:7 - MEMSETx
23    #[inline(always)]
24    pub fn memset(&self) -> MEMSET_R {
25        MEMSET_R::new((self.bits & 0xff) as u8)
26    }
27    ///Bits 8:15 - MEMWAITx
28    #[inline(always)]
29    pub fn memwait(&self) -> MEMWAIT_R {
30        MEMWAIT_R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    ///Bits 16:23 - MEMHOLDx
33    #[inline(always)]
34    pub fn memhold(&self) -> MEMHOLD_R {
35        MEMHOLD_R::new(((self.bits >> 16) & 0xff) as u8)
36    }
37    ///Bits 24:31 - MEMHIZx
38    #[inline(always)]
39    pub fn memhiz(&self) -> MEMHIZ_R {
40        MEMHIZ_R::new(((self.bits >> 24) & 0xff) as u8)
41    }
42}
43impl core::fmt::Debug for R {
44    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
45        f.debug_struct("PMEM")
46            .field("memhiz", &self.memhiz())
47            .field("memhold", &self.memhold())
48            .field("memwait", &self.memwait())
49            .field("memset", &self.memset())
50            .finish()
51    }
52}
53impl W {
54    ///Bits 0:7 - MEMSETx
55    #[inline(always)]
56    pub fn memset(&mut self) -> MEMSET_W<PMEMrs> {
57        MEMSET_W::new(self, 0)
58    }
59    ///Bits 8:15 - MEMWAITx
60    #[inline(always)]
61    pub fn memwait(&mut self) -> MEMWAIT_W<PMEMrs> {
62        MEMWAIT_W::new(self, 8)
63    }
64    ///Bits 16:23 - MEMHOLDx
65    #[inline(always)]
66    pub fn memhold(&mut self) -> MEMHOLD_W<PMEMrs> {
67        MEMHOLD_W::new(self, 16)
68    }
69    ///Bits 24:31 - MEMHIZx
70    #[inline(always)]
71    pub fn memhiz(&mut self) -> MEMHIZ_W<PMEMrs> {
72        MEMHIZ_W::new(self, 24)
73    }
74}
75/**Common memory space timing register %s
76
77You can [`read`](crate::Reg::read) this register and get [`pmem::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmem::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
78
79See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F107.html#FSMC:PMEM[2])*/
80pub struct PMEMrs;
81impl crate::RegisterSpec for PMEMrs {
82    type Ux = u32;
83}
84///`read()` method returns [`pmem::R`](R) reader structure
85impl crate::Readable for PMEMrs {}
86///`write(|w| ..)` method takes [`pmem::W`](W) writer structure
87impl crate::Writable for PMEMrs {
88    type Safety = crate::Unsafe;
89}
90///`reset()` method sets PMEM%s to value 0xfcfc_fcfc
91impl crate::Resettable for PMEMrs {
92    const RESET_VALUE: u32 = 0xfcfc_fcfc;
93}