stm32f1/stm32f107/flash/
cr.rs

1///Register `CR` reader
2pub type R = crate::R<CRrs>;
3///Register `CR` writer
4pub type W = crate::W<CRrs>;
5///Field `PG` reader - Programming
6pub type PG_R = crate::BitReader;
7///Field `PG` writer - Programming
8pub type PG_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `PER` reader - Page Erase
10pub type PER_R = crate::BitReader;
11///Field `PER` writer - Page Erase
12pub type PER_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `MER` reader - Mass Erase
14pub type MER_R = crate::BitReader;
15///Field `MER` writer - Mass Erase
16pub type MER_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `OPTPG` reader - Option byte programming
18pub type OPTPG_R = crate::BitReader;
19///Field `OPTPG` writer - Option byte programming
20pub type OPTPG_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `OPTER` reader - Option byte erase
22pub type OPTER_R = crate::BitReader;
23///Field `OPTER` writer - Option byte erase
24pub type OPTER_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `STRT` reader - Start
26pub type STRT_R = crate::BitReader;
27///Field `STRT` writer - Start
28pub type STRT_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `LOCK` reader - Lock
30pub type LOCK_R = crate::BitReader;
31///Field `LOCK` writer - Lock
32pub type LOCK_W<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `OPTWRE` reader - Option bytes write enable
34pub type OPTWRE_R = crate::BitReader;
35///Field `OPTWRE` writer - Option bytes write enable
36pub type OPTWRE_W<'a, REG> = crate::BitWriter<'a, REG>;
37///Field `ERRIE` reader - Error interrupt enable
38pub type ERRIE_R = crate::BitReader;
39///Field `ERRIE` writer - Error interrupt enable
40pub type ERRIE_W<'a, REG> = crate::BitWriter<'a, REG>;
41///Field `EOPIE` reader - End of operation interrupt enable
42pub type EOPIE_R = crate::BitReader;
43///Field `EOPIE` writer - End of operation interrupt enable
44pub type EOPIE_W<'a, REG> = crate::BitWriter<'a, REG>;
45impl R {
46    ///Bit 0 - Programming
47    #[inline(always)]
48    pub fn pg(&self) -> PG_R {
49        PG_R::new((self.bits & 1) != 0)
50    }
51    ///Bit 1 - Page Erase
52    #[inline(always)]
53    pub fn per(&self) -> PER_R {
54        PER_R::new(((self.bits >> 1) & 1) != 0)
55    }
56    ///Bit 2 - Mass Erase
57    #[inline(always)]
58    pub fn mer(&self) -> MER_R {
59        MER_R::new(((self.bits >> 2) & 1) != 0)
60    }
61    ///Bit 4 - Option byte programming
62    #[inline(always)]
63    pub fn optpg(&self) -> OPTPG_R {
64        OPTPG_R::new(((self.bits >> 4) & 1) != 0)
65    }
66    ///Bit 5 - Option byte erase
67    #[inline(always)]
68    pub fn opter(&self) -> OPTER_R {
69        OPTER_R::new(((self.bits >> 5) & 1) != 0)
70    }
71    ///Bit 6 - Start
72    #[inline(always)]
73    pub fn strt(&self) -> STRT_R {
74        STRT_R::new(((self.bits >> 6) & 1) != 0)
75    }
76    ///Bit 7 - Lock
77    #[inline(always)]
78    pub fn lock(&self) -> LOCK_R {
79        LOCK_R::new(((self.bits >> 7) & 1) != 0)
80    }
81    ///Bit 9 - Option bytes write enable
82    #[inline(always)]
83    pub fn optwre(&self) -> OPTWRE_R {
84        OPTWRE_R::new(((self.bits >> 9) & 1) != 0)
85    }
86    ///Bit 10 - Error interrupt enable
87    #[inline(always)]
88    pub fn errie(&self) -> ERRIE_R {
89        ERRIE_R::new(((self.bits >> 10) & 1) != 0)
90    }
91    ///Bit 12 - End of operation interrupt enable
92    #[inline(always)]
93    pub fn eopie(&self) -> EOPIE_R {
94        EOPIE_R::new(((self.bits >> 12) & 1) != 0)
95    }
96}
97impl core::fmt::Debug for R {
98    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
99        f.debug_struct("CR")
100            .field("pg", &self.pg())
101            .field("per", &self.per())
102            .field("mer", &self.mer())
103            .field("optpg", &self.optpg())
104            .field("opter", &self.opter())
105            .field("strt", &self.strt())
106            .field("lock", &self.lock())
107            .field("optwre", &self.optwre())
108            .field("errie", &self.errie())
109            .field("eopie", &self.eopie())
110            .finish()
111    }
112}
113impl W {
114    ///Bit 0 - Programming
115    #[inline(always)]
116    pub fn pg(&mut self) -> PG_W<CRrs> {
117        PG_W::new(self, 0)
118    }
119    ///Bit 1 - Page Erase
120    #[inline(always)]
121    pub fn per(&mut self) -> PER_W<CRrs> {
122        PER_W::new(self, 1)
123    }
124    ///Bit 2 - Mass Erase
125    #[inline(always)]
126    pub fn mer(&mut self) -> MER_W<CRrs> {
127        MER_W::new(self, 2)
128    }
129    ///Bit 4 - Option byte programming
130    #[inline(always)]
131    pub fn optpg(&mut self) -> OPTPG_W<CRrs> {
132        OPTPG_W::new(self, 4)
133    }
134    ///Bit 5 - Option byte erase
135    #[inline(always)]
136    pub fn opter(&mut self) -> OPTER_W<CRrs> {
137        OPTER_W::new(self, 5)
138    }
139    ///Bit 6 - Start
140    #[inline(always)]
141    pub fn strt(&mut self) -> STRT_W<CRrs> {
142        STRT_W::new(self, 6)
143    }
144    ///Bit 7 - Lock
145    #[inline(always)]
146    pub fn lock(&mut self) -> LOCK_W<CRrs> {
147        LOCK_W::new(self, 7)
148    }
149    ///Bit 9 - Option bytes write enable
150    #[inline(always)]
151    pub fn optwre(&mut self) -> OPTWRE_W<CRrs> {
152        OPTWRE_W::new(self, 9)
153    }
154    ///Bit 10 - Error interrupt enable
155    #[inline(always)]
156    pub fn errie(&mut self) -> ERRIE_W<CRrs> {
157        ERRIE_W::new(self, 10)
158    }
159    ///Bit 12 - End of operation interrupt enable
160    #[inline(always)]
161    pub fn eopie(&mut self) -> EOPIE_W<CRrs> {
162        EOPIE_W::new(self, 12)
163    }
164}
165/**Control register
166
167You can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
168
169See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F107.html#FLASH:CR)*/
170pub struct CRrs;
171impl crate::RegisterSpec for CRrs {
172    type Ux = u32;
173}
174///`read()` method returns [`cr::R`](R) reader structure
175impl crate::Readable for CRrs {}
176///`write(|w| ..)` method takes [`cr::W`](W) writer structure
177impl crate::Writable for CRrs {
178    type Safety = crate::Unsafe;
179}
180///`reset()` method sets CR to value 0x80
181impl crate::Resettable for CRrs {
182    const RESET_VALUE: u32 = 0x80;
183}
stm32f1/stm32f107/flash/cr.rs

stm32f1/stm32f107/flash/
cr.rs
