stm32f1/stm32f103/sdio/
cmd.rs

1///Register `CMD` reader
2pub type R = crate::R<CMDrs>;
3///Register `CMD` writer
4pub type W = crate::W<CMDrs>;
5///Field `CMDINDEX` reader - CMDINDEX
6pub type CMDINDEX_R = crate::FieldReader;
7///Field `CMDINDEX` writer - CMDINDEX
8pub type CMDINDEX_W<'a, REG> = crate::FieldWriter<'a, REG, 6, u8, crate::Safe>;
9/**WAITRESP
10
11Value on reset: 0*/
12#[cfg_attr(feature = "defmt", derive(defmt::Format))]
13#[derive(Clone, Copy, Debug, PartialEq, Eq)]
14#[repr(u8)]
15pub enum WAITRESP {
16    ///0: No response
17    NoResponse = 0,
18    ///1: Short response
19    ShortResponse = 1,
20    ///2: No reponse
21    NoResponse2 = 2,
22    ///3: Long reponse
23    LongResponse = 3,
24}
25impl From<WAITRESP> for u8 {
26    #[inline(always)]
27    fn from(variant: WAITRESP) -> Self {
28        variant as _
29    }
30}
31impl crate::FieldSpec for WAITRESP {
32    type Ux = u8;
33}
34impl crate::IsEnum for WAITRESP {}
35///Field `WAITRESP` reader - WAITRESP
36pub type WAITRESP_R = crate::FieldReader<WAITRESP>;
37impl WAITRESP_R {
38    ///Get enumerated values variant
39    #[inline(always)]
40    pub const fn variant(&self) -> WAITRESP {
41        match self.bits {
42            0 => WAITRESP::NoResponse,
43            1 => WAITRESP::ShortResponse,
44            2 => WAITRESP::NoResponse2,
45            3 => WAITRESP::LongResponse,
46            _ => unreachable!(),
47        }
48    }
49    ///No response
50    #[inline(always)]
51    pub fn is_no_response(&self) -> bool {
52        *self == WAITRESP::NoResponse
53    }
54    ///Short response
55    #[inline(always)]
56    pub fn is_short_response(&self) -> bool {
57        *self == WAITRESP::ShortResponse
58    }
59    ///No reponse
60    #[inline(always)]
61    pub fn is_no_response2(&self) -> bool {
62        *self == WAITRESP::NoResponse2
63    }
64    ///Long reponse
65    #[inline(always)]
66    pub fn is_long_response(&self) -> bool {
67        *self == WAITRESP::LongResponse
68    }
69}
70///Field `WAITRESP` writer - WAITRESP
71pub type WAITRESP_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WAITRESP, crate::Safe>;
72impl<'a, REG> WAITRESP_W<'a, REG>
73where
74    REG: crate::Writable + crate::RegisterSpec,
75    REG::Ux: From<u8>,
76{
77    ///No response
78    #[inline(always)]
79    pub fn no_response(self) -> &'a mut crate::W<REG> {
80        self.variant(WAITRESP::NoResponse)
81    }
82    ///Short response
83    #[inline(always)]
84    pub fn short_response(self) -> &'a mut crate::W<REG> {
85        self.variant(WAITRESP::ShortResponse)
86    }
87    ///No reponse
88    #[inline(always)]
89    pub fn no_response2(self) -> &'a mut crate::W<REG> {
90        self.variant(WAITRESP::NoResponse2)
91    }
92    ///Long reponse
93    #[inline(always)]
94    pub fn long_response(self) -> &'a mut crate::W<REG> {
95        self.variant(WAITRESP::LongResponse)
96    }
97}
98/**WAITINT
99
100Value on reset: 0*/
101#[cfg_attr(feature = "defmt", derive(defmt::Format))]
102#[derive(Clone, Copy, Debug, PartialEq, Eq)]
103pub enum WAITINT {
104    ///0: Don't wait for interrupt request
105    Disabled = 0,
106    ///1: Wait for interrupt request
107    Enabled = 1,
108}
109impl From<WAITINT> for bool {
110    #[inline(always)]
111    fn from(variant: WAITINT) -> Self {
112        variant as u8 != 0
113    }
114}
115///Field `WAITINT` reader - WAITINT
116pub type WAITINT_R = crate::BitReader<WAITINT>;
117impl WAITINT_R {
118    ///Get enumerated values variant
119    #[inline(always)]
120    pub const fn variant(&self) -> WAITINT {
121        match self.bits {
122            false => WAITINT::Disabled,
123            true => WAITINT::Enabled,
124        }
125    }
126    ///Don't wait for interrupt request
127    #[inline(always)]
128    pub fn is_disabled(&self) -> bool {
129        *self == WAITINT::Disabled
130    }
131    ///Wait for interrupt request
132    #[inline(always)]
133    pub fn is_enabled(&self) -> bool {
134        *self == WAITINT::Enabled
135    }
136}
137///Field `WAITINT` writer - WAITINT
138pub type WAITINT_W<'a, REG> = crate::BitWriter<'a, REG, WAITINT>;
139impl<'a, REG> WAITINT_W<'a, REG>
140where
141    REG: crate::Writable + crate::RegisterSpec,
142{
143    ///Don't wait for interrupt request
144    #[inline(always)]
145    pub fn disabled(self) -> &'a mut crate::W<REG> {
146        self.variant(WAITINT::Disabled)
147    }
148    ///Wait for interrupt request
149    #[inline(always)]
150    pub fn enabled(self) -> &'a mut crate::W<REG> {
151        self.variant(WAITINT::Enabled)
152    }
153}
154/**WAITPEND
155
156Value on reset: 0*/
157#[cfg_attr(feature = "defmt", derive(defmt::Format))]
158#[derive(Clone, Copy, Debug, PartialEq, Eq)]
159pub enum WAITPEND {
160    ///0: Don't wait for data end
161    Disabled = 0,
162    ///1: Wait for end of data transfer signal before sending command
163    Enabled = 1,
164}
165impl From<WAITPEND> for bool {
166    #[inline(always)]
167    fn from(variant: WAITPEND) -> Self {
168        variant as u8 != 0
169    }
170}
171///Field `WAITPEND` reader - WAITPEND
172pub type WAITPEND_R = crate::BitReader<WAITPEND>;
173impl WAITPEND_R {
174    ///Get enumerated values variant
175    #[inline(always)]
176    pub const fn variant(&self) -> WAITPEND {
177        match self.bits {
178            false => WAITPEND::Disabled,
179            true => WAITPEND::Enabled,
180        }
181    }
182    ///Don't wait for data end
183    #[inline(always)]
184    pub fn is_disabled(&self) -> bool {
185        *self == WAITPEND::Disabled
186    }
187    ///Wait for end of data transfer signal before sending command
188    #[inline(always)]
189    pub fn is_enabled(&self) -> bool {
190        *self == WAITPEND::Enabled
191    }
192}
193///Field `WAITPEND` writer - WAITPEND
194pub type WAITPEND_W<'a, REG> = crate::BitWriter<'a, REG, WAITPEND>;
195impl<'a, REG> WAITPEND_W<'a, REG>
196where
197    REG: crate::Writable + crate::RegisterSpec,
198{
199    ///Don't wait for data end
200    #[inline(always)]
201    pub fn disabled(self) -> &'a mut crate::W<REG> {
202        self.variant(WAITPEND::Disabled)
203    }
204    ///Wait for end of data transfer signal before sending command
205    #[inline(always)]
206    pub fn enabled(self) -> &'a mut crate::W<REG> {
207        self.variant(WAITPEND::Enabled)
208    }
209}
210/**CPSMEN
211
212Value on reset: 0*/
213#[cfg_attr(feature = "defmt", derive(defmt::Format))]
214#[derive(Clone, Copy, Debug, PartialEq, Eq)]
215pub enum CPSMEN {
216    ///0: Command path state machine disabled
217    Disabled = 0,
218    ///1: Command path state machine enabled
219    Enabled = 1,
220}
221impl From<CPSMEN> for bool {
222    #[inline(always)]
223    fn from(variant: CPSMEN) -> Self {
224        variant as u8 != 0
225    }
226}
227///Field `CPSMEN` reader - CPSMEN
228pub type CPSMEN_R = crate::BitReader<CPSMEN>;
229impl CPSMEN_R {
230    ///Get enumerated values variant
231    #[inline(always)]
232    pub const fn variant(&self) -> CPSMEN {
233        match self.bits {
234            false => CPSMEN::Disabled,
235            true => CPSMEN::Enabled,
236        }
237    }
238    ///Command path state machine disabled
239    #[inline(always)]
240    pub fn is_disabled(&self) -> bool {
241        *self == CPSMEN::Disabled
242    }
243    ///Command path state machine enabled
244    #[inline(always)]
245    pub fn is_enabled(&self) -> bool {
246        *self == CPSMEN::Enabled
247    }
248}
249///Field `CPSMEN` writer - CPSMEN
250pub type CPSMEN_W<'a, REG> = crate::BitWriter<'a, REG, CPSMEN>;
251impl<'a, REG> CPSMEN_W<'a, REG>
252where
253    REG: crate::Writable + crate::RegisterSpec,
254{
255    ///Command path state machine disabled
256    #[inline(always)]
257    pub fn disabled(self) -> &'a mut crate::W<REG> {
258        self.variant(CPSMEN::Disabled)
259    }
260    ///Command path state machine enabled
261    #[inline(always)]
262    pub fn enabled(self) -> &'a mut crate::W<REG> {
263        self.variant(CPSMEN::Enabled)
264    }
265}
266/**SDIOSuspend
267
268Value on reset: 0*/
269#[cfg_attr(feature = "defmt", derive(defmt::Format))]
270#[derive(Clone, Copy, Debug, PartialEq, Eq)]
271pub enum SDIOSUSPEND {
272    ///0: Next command is not a SDIO suspend command
273    Disabled = 0,
274    ///1: Next command send is a SDIO suspend command
275    Enabled = 1,
276}
277impl From<SDIOSUSPEND> for bool {
278    #[inline(always)]
279    fn from(variant: SDIOSUSPEND) -> Self {
280        variant as u8 != 0
281    }
282}
283///Field `SDIOSuspend` reader - SDIOSuspend
284pub type SDIOSUSPEND_R = crate::BitReader<SDIOSUSPEND>;
285impl SDIOSUSPEND_R {
286    ///Get enumerated values variant
287    #[inline(always)]
288    pub const fn variant(&self) -> SDIOSUSPEND {
289        match self.bits {
290            false => SDIOSUSPEND::Disabled,
291            true => SDIOSUSPEND::Enabled,
292        }
293    }
294    ///Next command is not a SDIO suspend command
295    #[inline(always)]
296    pub fn is_disabled(&self) -> bool {
297        *self == SDIOSUSPEND::Disabled
298    }
299    ///Next command send is a SDIO suspend command
300    #[inline(always)]
301    pub fn is_enabled(&self) -> bool {
302        *self == SDIOSUSPEND::Enabled
303    }
304}
305///Field `SDIOSuspend` writer - SDIOSuspend
306pub type SDIOSUSPEND_W<'a, REG> = crate::BitWriter<'a, REG, SDIOSUSPEND>;
307impl<'a, REG> SDIOSUSPEND_W<'a, REG>
308where
309    REG: crate::Writable + crate::RegisterSpec,
310{
311    ///Next command is not a SDIO suspend command
312    #[inline(always)]
313    pub fn disabled(self) -> &'a mut crate::W<REG> {
314        self.variant(SDIOSUSPEND::Disabled)
315    }
316    ///Next command send is a SDIO suspend command
317    #[inline(always)]
318    pub fn enabled(self) -> &'a mut crate::W<REG> {
319        self.variant(SDIOSUSPEND::Enabled)
320    }
321}
322/**ENCMDcompl
323
324Value on reset: 0*/
325#[cfg_attr(feature = "defmt", derive(defmt::Format))]
326#[derive(Clone, Copy, Debug, PartialEq, Eq)]
327pub enum ENCMDCOMPL {
328    ///0: Command complete signal disabled
329    Disabled = 0,
330    ///1: Command complete signal enabled
331    Enabled = 1,
332}
333impl From<ENCMDCOMPL> for bool {
334    #[inline(always)]
335    fn from(variant: ENCMDCOMPL) -> Self {
336        variant as u8 != 0
337    }
338}
339///Field `ENCMDcompl` reader - ENCMDcompl
340pub type ENCMDCOMPL_R = crate::BitReader<ENCMDCOMPL>;
341impl ENCMDCOMPL_R {
342    ///Get enumerated values variant
343    #[inline(always)]
344    pub const fn variant(&self) -> ENCMDCOMPL {
345        match self.bits {
346            false => ENCMDCOMPL::Disabled,
347            true => ENCMDCOMPL::Enabled,
348        }
349    }
350    ///Command complete signal disabled
351    #[inline(always)]
352    pub fn is_disabled(&self) -> bool {
353        *self == ENCMDCOMPL::Disabled
354    }
355    ///Command complete signal enabled
356    #[inline(always)]
357    pub fn is_enabled(&self) -> bool {
358        *self == ENCMDCOMPL::Enabled
359    }
360}
361///Field `ENCMDcompl` writer - ENCMDcompl
362pub type ENCMDCOMPL_W<'a, REG> = crate::BitWriter<'a, REG, ENCMDCOMPL>;
363impl<'a, REG> ENCMDCOMPL_W<'a, REG>
364where
365    REG: crate::Writable + crate::RegisterSpec,
366{
367    ///Command complete signal disabled
368    #[inline(always)]
369    pub fn disabled(self) -> &'a mut crate::W<REG> {
370        self.variant(ENCMDCOMPL::Disabled)
371    }
372    ///Command complete signal enabled
373    #[inline(always)]
374    pub fn enabled(self) -> &'a mut crate::W<REG> {
375        self.variant(ENCMDCOMPL::Enabled)
376    }
377}
378/**nIEN
379
380Value on reset: 0*/
381#[cfg_attr(feature = "defmt", derive(defmt::Format))]
382#[derive(Clone, Copy, Debug, PartialEq, Eq)]
383pub enum N_IEN {
384    ///0: Interrupts to the CE-ATA not disabled
385    Disabled = 0,
386    ///1: Interrupt to the CE-ATA are disabled
387    Enabled = 1,
388}
389impl From<N_IEN> for bool {
390    #[inline(always)]
391    fn from(variant: N_IEN) -> Self {
392        variant as u8 != 0
393    }
394}
395///Field `nIEN` reader - nIEN
396pub type N_IEN_R = crate::BitReader<N_IEN>;
397impl N_IEN_R {
398    ///Get enumerated values variant
399    #[inline(always)]
400    pub const fn variant(&self) -> N_IEN {
401        match self.bits {
402            false => N_IEN::Disabled,
403            true => N_IEN::Enabled,
404        }
405    }
406    ///Interrupts to the CE-ATA not disabled
407    #[inline(always)]
408    pub fn is_disabled(&self) -> bool {
409        *self == N_IEN::Disabled
410    }
411    ///Interrupt to the CE-ATA are disabled
412    #[inline(always)]
413    pub fn is_enabled(&self) -> bool {
414        *self == N_IEN::Enabled
415    }
416}
417///Field `nIEN` writer - nIEN
418pub type N_IEN_W<'a, REG> = crate::BitWriter<'a, REG, N_IEN>;
419impl<'a, REG> N_IEN_W<'a, REG>
420where
421    REG: crate::Writable + crate::RegisterSpec,
422{
423    ///Interrupts to the CE-ATA not disabled
424    #[inline(always)]
425    pub fn disabled(self) -> &'a mut crate::W<REG> {
426        self.variant(N_IEN::Disabled)
427    }
428    ///Interrupt to the CE-ATA are disabled
429    #[inline(always)]
430    pub fn enabled(self) -> &'a mut crate::W<REG> {
431        self.variant(N_IEN::Enabled)
432    }
433}
434/**CE_ATACMD
435
436Value on reset: 0*/
437#[cfg_attr(feature = "defmt", derive(defmt::Format))]
438#[derive(Clone, Copy, Debug, PartialEq, Eq)]
439pub enum CE_ATACMD {
440    ///0: CE-ATA command disabled
441    Disabled = 0,
442    ///1: CE-ATA command enabled
443    Enabled = 1,
444}
445impl From<CE_ATACMD> for bool {
446    #[inline(always)]
447    fn from(variant: CE_ATACMD) -> Self {
448        variant as u8 != 0
449    }
450}
451///Field `CE_ATACMD` reader - CE_ATACMD
452pub type CE_ATACMD_R = crate::BitReader<CE_ATACMD>;
453impl CE_ATACMD_R {
454    ///Get enumerated values variant
455    #[inline(always)]
456    pub const fn variant(&self) -> CE_ATACMD {
457        match self.bits {
458            false => CE_ATACMD::Disabled,
459            true => CE_ATACMD::Enabled,
460        }
461    }
462    ///CE-ATA command disabled
463    #[inline(always)]
464    pub fn is_disabled(&self) -> bool {
465        *self == CE_ATACMD::Disabled
466    }
467    ///CE-ATA command enabled
468    #[inline(always)]
469    pub fn is_enabled(&self) -> bool {
470        *self == CE_ATACMD::Enabled
471    }
472}
473///Field `CE_ATACMD` writer - CE_ATACMD
474pub type CE_ATACMD_W<'a, REG> = crate::BitWriter<'a, REG, CE_ATACMD>;
475impl<'a, REG> CE_ATACMD_W<'a, REG>
476where
477    REG: crate::Writable + crate::RegisterSpec,
478{
479    ///CE-ATA command disabled
480    #[inline(always)]
481    pub fn disabled(self) -> &'a mut crate::W<REG> {
482        self.variant(CE_ATACMD::Disabled)
483    }
484    ///CE-ATA command enabled
485    #[inline(always)]
486    pub fn enabled(self) -> &'a mut crate::W<REG> {
487        self.variant(CE_ATACMD::Enabled)
488    }
489}
490impl R {
491    ///Bits 0:5 - CMDINDEX
492    #[inline(always)]
493    pub fn cmdindex(&self) -> CMDINDEX_R {
494        CMDINDEX_R::new((self.bits & 0x3f) as u8)
495    }
496    ///Bits 6:7 - WAITRESP
497    #[inline(always)]
498    pub fn waitresp(&self) -> WAITRESP_R {
499        WAITRESP_R::new(((self.bits >> 6) & 3) as u8)
500    }
501    ///Bit 8 - WAITINT
502    #[inline(always)]
503    pub fn waitint(&self) -> WAITINT_R {
504        WAITINT_R::new(((self.bits >> 8) & 1) != 0)
505    }
506    ///Bit 9 - WAITPEND
507    #[inline(always)]
508    pub fn waitpend(&self) -> WAITPEND_R {
509        WAITPEND_R::new(((self.bits >> 9) & 1) != 0)
510    }
511    ///Bit 10 - CPSMEN
512    #[inline(always)]
513    pub fn cpsmen(&self) -> CPSMEN_R {
514        CPSMEN_R::new(((self.bits >> 10) & 1) != 0)
515    }
516    ///Bit 11 - SDIOSuspend
517    #[inline(always)]
518    pub fn sdiosuspend(&self) -> SDIOSUSPEND_R {
519        SDIOSUSPEND_R::new(((self.bits >> 11) & 1) != 0)
520    }
521    ///Bit 12 - ENCMDcompl
522    #[inline(always)]
523    pub fn encmdcompl(&self) -> ENCMDCOMPL_R {
524        ENCMDCOMPL_R::new(((self.bits >> 12) & 1) != 0)
525    }
526    ///Bit 13 - nIEN
527    #[inline(always)]
528    pub fn n_ien(&self) -> N_IEN_R {
529        N_IEN_R::new(((self.bits >> 13) & 1) != 0)
530    }
531    ///Bit 14 - CE_ATACMD
532    #[inline(always)]
533    pub fn ce_atacmd(&self) -> CE_ATACMD_R {
534        CE_ATACMD_R::new(((self.bits >> 14) & 1) != 0)
535    }
536}
537impl core::fmt::Debug for R {
538    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
539        f.debug_struct("CMD")
540            .field("cmdindex", &self.cmdindex())
541            .field("waitresp", &self.waitresp())
542            .field("waitint", &self.waitint())
543            .field("waitpend", &self.waitpend())
544            .field("cpsmen", &self.cpsmen())
545            .field("sdiosuspend", &self.sdiosuspend())
546            .field("encmdcompl", &self.encmdcompl())
547            .field("n_ien", &self.n_ien())
548            .field("ce_atacmd", &self.ce_atacmd())
549            .finish()
550    }
551}
552impl W {
553    ///Bits 0:5 - CMDINDEX
554    #[inline(always)]
555    pub fn cmdindex(&mut self) -> CMDINDEX_W<CMDrs> {
556        CMDINDEX_W::new(self, 0)
557    }
558    ///Bits 6:7 - WAITRESP
559    #[inline(always)]
560    pub fn waitresp(&mut self) -> WAITRESP_W<CMDrs> {
561        WAITRESP_W::new(self, 6)
562    }
563    ///Bit 8 - WAITINT
564    #[inline(always)]
565    pub fn waitint(&mut self) -> WAITINT_W<CMDrs> {
566        WAITINT_W::new(self, 8)
567    }
568    ///Bit 9 - WAITPEND
569    #[inline(always)]
570    pub fn waitpend(&mut self) -> WAITPEND_W<CMDrs> {
571        WAITPEND_W::new(self, 9)
572    }
573    ///Bit 10 - CPSMEN
574    #[inline(always)]
575    pub fn cpsmen(&mut self) -> CPSMEN_W<CMDrs> {
576        CPSMEN_W::new(self, 10)
577    }
578    ///Bit 11 - SDIOSuspend
579    #[inline(always)]
580    pub fn sdiosuspend(&mut self) -> SDIOSUSPEND_W<CMDrs> {
581        SDIOSUSPEND_W::new(self, 11)
582    }
583    ///Bit 12 - ENCMDcompl
584    #[inline(always)]
585    pub fn encmdcompl(&mut self) -> ENCMDCOMPL_W<CMDrs> {
586        ENCMDCOMPL_W::new(self, 12)
587    }
588    ///Bit 13 - nIEN
589    #[inline(always)]
590    pub fn n_ien(&mut self) -> N_IEN_W<CMDrs> {
591        N_IEN_W::new(self, 13)
592    }
593    ///Bit 14 - CE_ATACMD
594    #[inline(always)]
595    pub fn ce_atacmd(&mut self) -> CE_ATACMD_W<CMDrs> {
596        CE_ATACMD_W::new(self, 14)
597    }
598}
599/**SDIO command register (SDIO_CMD)
600
601You can [`read`](crate::Reg::read) this register and get [`cmd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
602
603See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F103.html#SDIO:CMD)*/
604pub struct CMDrs;
605impl crate::RegisterSpec for CMDrs {
606    type Ux = u32;
607}
608///`read()` method returns [`cmd::R`](R) reader structure
609impl crate::Readable for CMDrs {}
610///`write(|w| ..)` method takes [`cmd::W`](W) writer structure
611impl crate::Writable for CMDrs {
612    type Safety = crate::Unsafe;
613}
614///`reset()` method sets CMD to value 0
615impl crate::Resettable for CMDrs {}
stm32f1/stm32f103/sdio/cmd.rs

stm32f1/stm32f103/sdio/
cmd.rs
