stm32f1/stm32f103/can/rx/
rdlr.rs

1///Register `RDLR` reader
2pub type R = crate::R<RDLRrs>;
3///Field `DATA(0-3)` reader - DATA%s
4pub type DATA_R = crate::FieldReader;
5impl R {
6    ///DATA(0-3)
7    ///
8    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `DATA0` field.</div>
9    #[inline(always)]
10    pub fn data(&self, n: u8) -> DATA_R {
11        #[allow(clippy::no_effect)]
12        [(); 4][n as usize];
13        DATA_R::new(((self.bits >> (n * 8)) & 0xff) as u8)
14    }
15    ///Iterator for array of:
16    ///DATA(0-3)
17    #[inline(always)]
18    pub fn data_iter(&self) -> impl Iterator<Item = DATA_R> + '_ {
19        (0..4).map(move |n| DATA_R::new(((self.bits >> (n * 8)) & 0xff) as u8))
20    }
21    ///Bits 0:7 - DATA0
22    #[inline(always)]
23    pub fn data0(&self) -> DATA_R {
24        DATA_R::new((self.bits & 0xff) as u8)
25    }
26    ///Bits 8:15 - DATA1
27    #[inline(always)]
28    pub fn data1(&self) -> DATA_R {
29        DATA_R::new(((self.bits >> 8) & 0xff) as u8)
30    }
31    ///Bits 16:23 - DATA2
32    #[inline(always)]
33    pub fn data2(&self) -> DATA_R {
34        DATA_R::new(((self.bits >> 16) & 0xff) as u8)
35    }
36    ///Bits 24:31 - DATA3
37    #[inline(always)]
38    pub fn data3(&self) -> DATA_R {
39        DATA_R::new(((self.bits >> 24) & 0xff) as u8)
40    }
41}
42impl core::fmt::Debug for R {
43    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
44        f.debug_struct("RDLR")
45            .field("data0", &self.data0())
46            .field("data1", &self.data1())
47            .field("data2", &self.data2())
48            .field("data3", &self.data3())
49            .finish()
50    }
51}
52/**CAN_RDL0R
53
54You can [`read`](crate::Reg::read) this register and get [`rdlr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
55pub struct RDLRrs;
56impl crate::RegisterSpec for RDLRrs {
57    type Ux = u32;
58}
59///`read()` method returns [`rdlr::R`](R) reader structure
60impl crate::Readable for RDLRrs {}
61///`reset()` method sets RDLR to value 0
62impl crate::Resettable for RDLRrs {}
stm32f1/stm32f103/can/rx/rdlr.rs

stm32f1/stm32f103/can/rx/
rdlr.rs
