Struct stm32f1::stm32f103::dma1::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock { pub isr: ISR, pub ifcr: IFCR, pub ccr1: CCR1, pub cndtr1: CNDTR1, pub cpar1: CPAR1, pub cmar1: CMAR1, pub ccr2: CCR2, pub cndtr2: CNDTR2, pub cpar2: CPAR2, pub cmar2: CMAR2, pub ccr3: CCR3, pub cndtr3: CNDTR3, pub cpar3: CPAR3, pub cmar3: CMAR3, pub ccr4: CCR4, pub cndtr4: CNDTR4, pub cpar4: CPAR4, pub cmar4: CMAR4, pub ccr5: CCR5, pub cndtr5: CNDTR5, pub cpar5: CPAR5, pub cmar5: CMAR5, pub ccr6: CCR6, pub cndtr6: CNDTR6, pub cpar6: CPAR6, pub cmar6: CMAR6, pub ccr7: CCR7, pub cndtr7: CNDTR7, pub cpar7: CPAR7, pub cmar7: CMAR7, // some fields omitted }
Register block
Fields
isr: ISR
0x00 - DMA interrupt status register (DMA_ISR)
ifcr: IFCR
0x04 - DMA interrupt flag clear register (DMA_IFCR)
ccr1: CCR1
0x08 - DMA channel configuration register (DMA_CCR)
cndtr1: CNDTR1
0x0c - DMA channel 1 number of data register
cpar1: CPAR1
0x10 - DMA channel 1 peripheral address register
cmar1: CMAR1
0x14 - DMA channel 1 memory address register
ccr2: CCR2
0x1c - DMA channel configuration register (DMA_CCR)
cndtr2: CNDTR2
0x20 - DMA channel 2 number of data register
cpar2: CPAR2
0x24 - DMA channel 2 peripheral address register
cmar2: CMAR2
0x28 - DMA channel 2 memory address register
ccr3: CCR3
0x30 - DMA channel configuration register (DMA_CCR)
cndtr3: CNDTR3
0x34 - DMA channel 3 number of data register
cpar3: CPAR3
0x38 - DMA channel 3 peripheral address register
cmar3: CMAR3
0x3c - DMA channel 3 memory address register
ccr4: CCR4
0x44 - DMA channel configuration register (DMA_CCR)
cndtr4: CNDTR4
0x48 - DMA channel 4 number of data register
cpar4: CPAR4
0x4c - DMA channel 4 peripheral address register
cmar4: CMAR4
0x50 - DMA channel 4 memory address register
ccr5: CCR5
0x58 - DMA channel configuration register (DMA_CCR)
cndtr5: CNDTR5
0x5c - DMA channel 5 number of data register
cpar5: CPAR5
0x60 - DMA channel 5 peripheral address register
cmar5: CMAR5
0x64 - DMA channel 5 memory address register
ccr6: CCR6
0x6c - DMA channel configuration register (DMA_CCR)
cndtr6: CNDTR6
0x70 - DMA channel 6 number of data register
cpar6: CPAR6
0x74 - DMA channel 6 peripheral address register
cmar6: CMAR6
0x78 - DMA channel 6 memory address register
ccr7: CCR7
0x80 - DMA channel configuration register (DMA_CCR)
cndtr7: CNDTR7
0x84 - DMA channel 7 number of data register
cpar7: CPAR7
0x88 - DMA channel 7 peripheral address register
cmar7: CMAR7
0x8c - DMA channel 7 memory address register
Auto Trait Implementations
impl Send for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl !Sync for RegisterBlock