stm32f1/stm32f107/tim6/
cr1.rs

1#[doc = "Register `CR1` reader"]
2pub struct R(crate::R<CR1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CR1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CR1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CR1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CR1` writer"]
17pub struct W(crate::W<CR1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CR1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CR1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CR1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Auto-reload preload enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum ARPE_A {
40    #[doc = "0: TIMx_APRR register is not buffered"]
41    Disabled = 0,
42    #[doc = "1: TIMx_APRR register is buffered"]
43    Enabled = 1,
44}
45impl From<ARPE_A> for bool {
46    #[inline(always)]
47    fn from(variant: ARPE_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `ARPE` reader - Auto-reload preload enable"]
52pub type ARPE_R = crate::BitReader<ARPE_A>;
53impl ARPE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> ARPE_A {
57        match self.bits {
58            false => ARPE_A::Disabled,
59            true => ARPE_A::Enabled,
60        }
61    }
62    #[doc = "Checks if the value of the field is `Disabled`"]
63    #[inline(always)]
64    pub fn is_disabled(&self) -> bool {
65        *self == ARPE_A::Disabled
66    }
67    #[doc = "Checks if the value of the field is `Enabled`"]
68    #[inline(always)]
69    pub fn is_enabled(&self) -> bool {
70        *self == ARPE_A::Enabled
71    }
72}
73#[doc = "Field `ARPE` writer - Auto-reload preload enable"]
74pub type ARPE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, ARPE_A, O>;
75impl<'a, const O: u8> ARPE_W<'a, O> {
76    #[doc = "TIMx_APRR register is not buffered"]
77    #[inline(always)]
78    pub fn disabled(self) -> &'a mut W {
79        self.variant(ARPE_A::Disabled)
80    }
81    #[doc = "TIMx_APRR register is buffered"]
82    #[inline(always)]
83    pub fn enabled(self) -> &'a mut W {
84        self.variant(ARPE_A::Enabled)
85    }
86}
87#[doc = "One-pulse mode\n\nValue on reset: 0"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum OPM_A {
90    #[doc = "0: Counter is not stopped at update event"]
91    Disabled = 0,
92    #[doc = "1: Counter stops counting at the next update event (clearing the CEN bit)"]
93    Enabled = 1,
94}
95impl From<OPM_A> for bool {
96    #[inline(always)]
97    fn from(variant: OPM_A) -> Self {
98        variant as u8 != 0
99    }
100}
101#[doc = "Field `OPM` reader - One-pulse mode"]
102pub type OPM_R = crate::BitReader<OPM_A>;
103impl OPM_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> OPM_A {
107        match self.bits {
108            false => OPM_A::Disabled,
109            true => OPM_A::Enabled,
110        }
111    }
112    #[doc = "Checks if the value of the field is `Disabled`"]
113    #[inline(always)]
114    pub fn is_disabled(&self) -> bool {
115        *self == OPM_A::Disabled
116    }
117    #[doc = "Checks if the value of the field is `Enabled`"]
118    #[inline(always)]
119    pub fn is_enabled(&self) -> bool {
120        *self == OPM_A::Enabled
121    }
122}
123#[doc = "Field `OPM` writer - One-pulse mode"]
124pub type OPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, OPM_A, O>;
125impl<'a, const O: u8> OPM_W<'a, O> {
126    #[doc = "Counter is not stopped at update event"]
127    #[inline(always)]
128    pub fn disabled(self) -> &'a mut W {
129        self.variant(OPM_A::Disabled)
130    }
131    #[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
132    #[inline(always)]
133    pub fn enabled(self) -> &'a mut W {
134        self.variant(OPM_A::Enabled)
135    }
136}
137#[doc = "Update request source\n\nValue on reset: 0"]
138#[derive(Clone, Copy, Debug, PartialEq)]
139pub enum URS_A {
140    #[doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"]
141    AnyEvent = 0,
142    #[doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request"]
143    CounterOnly = 1,
144}
145impl From<URS_A> for bool {
146    #[inline(always)]
147    fn from(variant: URS_A) -> Self {
148        variant as u8 != 0
149    }
150}
151#[doc = "Field `URS` reader - Update request source"]
152pub type URS_R = crate::BitReader<URS_A>;
153impl URS_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> URS_A {
157        match self.bits {
158            false => URS_A::AnyEvent,
159            true => URS_A::CounterOnly,
160        }
161    }
162    #[doc = "Checks if the value of the field is `AnyEvent`"]
163    #[inline(always)]
164    pub fn is_any_event(&self) -> bool {
165        *self == URS_A::AnyEvent
166    }
167    #[doc = "Checks if the value of the field is `CounterOnly`"]
168    #[inline(always)]
169    pub fn is_counter_only(&self) -> bool {
170        *self == URS_A::CounterOnly
171    }
172}
173#[doc = "Field `URS` writer - Update request source"]
174pub type URS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, URS_A, O>;
175impl<'a, const O: u8> URS_W<'a, O> {
176    #[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"]
177    #[inline(always)]
178    pub fn any_event(self) -> &'a mut W {
179        self.variant(URS_A::AnyEvent)
180    }
181    #[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"]
182    #[inline(always)]
183    pub fn counter_only(self) -> &'a mut W {
184        self.variant(URS_A::CounterOnly)
185    }
186}
187#[doc = "Update disable\n\nValue on reset: 0"]
188#[derive(Clone, Copy, Debug, PartialEq)]
189pub enum UDIS_A {
190    #[doc = "0: Update event enabled"]
191    Enabled = 0,
192    #[doc = "1: Update event disabled"]
193    Disabled = 1,
194}
195impl From<UDIS_A> for bool {
196    #[inline(always)]
197    fn from(variant: UDIS_A) -> Self {
198        variant as u8 != 0
199    }
200}
201#[doc = "Field `UDIS` reader - Update disable"]
202pub type UDIS_R = crate::BitReader<UDIS_A>;
203impl UDIS_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> UDIS_A {
207        match self.bits {
208            false => UDIS_A::Enabled,
209            true => UDIS_A::Disabled,
210        }
211    }
212    #[doc = "Checks if the value of the field is `Enabled`"]
213    #[inline(always)]
214    pub fn is_enabled(&self) -> bool {
215        *self == UDIS_A::Enabled
216    }
217    #[doc = "Checks if the value of the field is `Disabled`"]
218    #[inline(always)]
219    pub fn is_disabled(&self) -> bool {
220        *self == UDIS_A::Disabled
221    }
222}
223#[doc = "Field `UDIS` writer - Update disable"]
224pub type UDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, UDIS_A, O>;
225impl<'a, const O: u8> UDIS_W<'a, O> {
226    #[doc = "Update event enabled"]
227    #[inline(always)]
228    pub fn enabled(self) -> &'a mut W {
229        self.variant(UDIS_A::Enabled)
230    }
231    #[doc = "Update event disabled"]
232    #[inline(always)]
233    pub fn disabled(self) -> &'a mut W {
234        self.variant(UDIS_A::Disabled)
235    }
236}
237#[doc = "Counter enable\n\nValue on reset: 0"]
238#[derive(Clone, Copy, Debug, PartialEq)]
239pub enum CEN_A {
240    #[doc = "0: Counter disabled"]
241    Disabled = 0,
242    #[doc = "1: Counter enabled"]
243    Enabled = 1,
244}
245impl From<CEN_A> for bool {
246    #[inline(always)]
247    fn from(variant: CEN_A) -> Self {
248        variant as u8 != 0
249    }
250}
251#[doc = "Field `CEN` reader - Counter enable"]
252pub type CEN_R = crate::BitReader<CEN_A>;
253impl CEN_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> CEN_A {
257        match self.bits {
258            false => CEN_A::Disabled,
259            true => CEN_A::Enabled,
260        }
261    }
262    #[doc = "Checks if the value of the field is `Disabled`"]
263    #[inline(always)]
264    pub fn is_disabled(&self) -> bool {
265        *self == CEN_A::Disabled
266    }
267    #[doc = "Checks if the value of the field is `Enabled`"]
268    #[inline(always)]
269    pub fn is_enabled(&self) -> bool {
270        *self == CEN_A::Enabled
271    }
272}
273#[doc = "Field `CEN` writer - Counter enable"]
274pub type CEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, CEN_A, O>;
275impl<'a, const O: u8> CEN_W<'a, O> {
276    #[doc = "Counter disabled"]
277    #[inline(always)]
278    pub fn disabled(self) -> &'a mut W {
279        self.variant(CEN_A::Disabled)
280    }
281    #[doc = "Counter enabled"]
282    #[inline(always)]
283    pub fn enabled(self) -> &'a mut W {
284        self.variant(CEN_A::Enabled)
285    }
286}
287impl R {
288    #[doc = "Bit 7 - Auto-reload preload enable"]
289    #[inline(always)]
290    pub fn arpe(&self) -> ARPE_R {
291        ARPE_R::new(((self.bits >> 7) & 1) != 0)
292    }
293    #[doc = "Bit 3 - One-pulse mode"]
294    #[inline(always)]
295    pub fn opm(&self) -> OPM_R {
296        OPM_R::new(((self.bits >> 3) & 1) != 0)
297    }
298    #[doc = "Bit 2 - Update request source"]
299    #[inline(always)]
300    pub fn urs(&self) -> URS_R {
301        URS_R::new(((self.bits >> 2) & 1) != 0)
302    }
303    #[doc = "Bit 1 - Update disable"]
304    #[inline(always)]
305    pub fn udis(&self) -> UDIS_R {
306        UDIS_R::new(((self.bits >> 1) & 1) != 0)
307    }
308    #[doc = "Bit 0 - Counter enable"]
309    #[inline(always)]
310    pub fn cen(&self) -> CEN_R {
311        CEN_R::new((self.bits & 1) != 0)
312    }
313}
314impl W {
315    #[doc = "Bit 7 - Auto-reload preload enable"]
316    #[inline(always)]
317    pub fn arpe(&mut self) -> ARPE_W<7> {
318        ARPE_W::new(self)
319    }
320    #[doc = "Bit 3 - One-pulse mode"]
321    #[inline(always)]
322    pub fn opm(&mut self) -> OPM_W<3> {
323        OPM_W::new(self)
324    }
325    #[doc = "Bit 2 - Update request source"]
326    #[inline(always)]
327    pub fn urs(&mut self) -> URS_W<2> {
328        URS_W::new(self)
329    }
330    #[doc = "Bit 1 - Update disable"]
331    #[inline(always)]
332    pub fn udis(&mut self) -> UDIS_W<1> {
333        UDIS_W::new(self)
334    }
335    #[doc = "Bit 0 - Counter enable"]
336    #[inline(always)]
337    pub fn cen(&mut self) -> CEN_W<0> {
338        CEN_W::new(self)
339    }
340    #[doc = "Writes raw bits to the register."]
341    #[inline(always)]
342    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
343        self.0.bits(bits);
344        self
345    }
346}
347#[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](index.html) module"]
348pub struct CR1_SPEC;
349impl crate::RegisterSpec for CR1_SPEC {
350    type Ux = u32;
351}
352#[doc = "`read()` method returns [cr1::R](R) reader structure"]
353impl crate::Readable for CR1_SPEC {
354    type Reader = R;
355}
356#[doc = "`write(|w| ..)` method takes [cr1::W](W) writer structure"]
357impl crate::Writable for CR1_SPEC {
358    type Writer = W;
359}
360#[doc = "`reset()` method sets CR1 to value 0"]
361impl crate::Resettable for CR1_SPEC {
362    #[inline(always)]
363    fn reset_value() -> Self::Ux {
364        0
365    }
366}
stm32f1/stm32f107/tim6/cr1.rs

stm32f1/stm32f107/tim6/
cr1.rs
