stm32f1/stm32f103/i2c1/
cr2.rs

1#[doc = "Register `CR2` reader"]
2pub struct R(crate::R<CR2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CR2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CR2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CR2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CR2` writer"]
17pub struct W(crate::W<CR2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CR2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CR2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CR2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "DMA last transfer\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum LAST_A {
40    #[doc = "0: Next DMA EOT is not the last transfer"]
41    NotLast = 0,
42    #[doc = "1: Next DMA EOT is the last transfer"]
43    Last = 1,
44}
45impl From<LAST_A> for bool {
46    #[inline(always)]
47    fn from(variant: LAST_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `LAST` reader - DMA last transfer"]
52pub type LAST_R = crate::BitReader<LAST_A>;
53impl LAST_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> LAST_A {
57        match self.bits {
58            false => LAST_A::NotLast,
59            true => LAST_A::Last,
60        }
61    }
62    #[doc = "Checks if the value of the field is `NotLast`"]
63    #[inline(always)]
64    pub fn is_not_last(&self) -> bool {
65        *self == LAST_A::NotLast
66    }
67    #[doc = "Checks if the value of the field is `Last`"]
68    #[inline(always)]
69    pub fn is_last(&self) -> bool {
70        *self == LAST_A::Last
71    }
72}
73#[doc = "Field `LAST` writer - DMA last transfer"]
74pub type LAST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, LAST_A, O>;
75impl<'a, const O: u8> LAST_W<'a, O> {
76    #[doc = "Next DMA EOT is not the last transfer"]
77    #[inline(always)]
78    pub fn not_last(self) -> &'a mut W {
79        self.variant(LAST_A::NotLast)
80    }
81    #[doc = "Next DMA EOT is the last transfer"]
82    #[inline(always)]
83    pub fn last(self) -> &'a mut W {
84        self.variant(LAST_A::Last)
85    }
86}
87#[doc = "DMA requests enable\n\nValue on reset: 0"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum DMAEN_A {
90    #[doc = "0: DMA requests disabled"]
91    Disabled = 0,
92    #[doc = "1: DMA request enabled when TxE=1 or RxNE=1"]
93    Enabled = 1,
94}
95impl From<DMAEN_A> for bool {
96    #[inline(always)]
97    fn from(variant: DMAEN_A) -> Self {
98        variant as u8 != 0
99    }
100}
101#[doc = "Field `DMAEN` reader - DMA requests enable"]
102pub type DMAEN_R = crate::BitReader<DMAEN_A>;
103impl DMAEN_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> DMAEN_A {
107        match self.bits {
108            false => DMAEN_A::Disabled,
109            true => DMAEN_A::Enabled,
110        }
111    }
112    #[doc = "Checks if the value of the field is `Disabled`"]
113    #[inline(always)]
114    pub fn is_disabled(&self) -> bool {
115        *self == DMAEN_A::Disabled
116    }
117    #[doc = "Checks if the value of the field is `Enabled`"]
118    #[inline(always)]
119    pub fn is_enabled(&self) -> bool {
120        *self == DMAEN_A::Enabled
121    }
122}
123#[doc = "Field `DMAEN` writer - DMA requests enable"]
124pub type DMAEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, DMAEN_A, O>;
125impl<'a, const O: u8> DMAEN_W<'a, O> {
126    #[doc = "DMA requests disabled"]
127    #[inline(always)]
128    pub fn disabled(self) -> &'a mut W {
129        self.variant(DMAEN_A::Disabled)
130    }
131    #[doc = "DMA request enabled when TxE=1 or RxNE=1"]
132    #[inline(always)]
133    pub fn enabled(self) -> &'a mut W {
134        self.variant(DMAEN_A::Enabled)
135    }
136}
137#[doc = "Buffer interrupt enable\n\nValue on reset: 0"]
138#[derive(Clone, Copy, Debug, PartialEq)]
139pub enum ITBUFEN_A {
140    #[doc = "0: TxE=1 or RxNE=1 does not generate any interrupt"]
141    Disabled = 0,
142    #[doc = "1: TxE=1 or RxNE=1 generates Event interrupt"]
143    Enabled = 1,
144}
145impl From<ITBUFEN_A> for bool {
146    #[inline(always)]
147    fn from(variant: ITBUFEN_A) -> Self {
148        variant as u8 != 0
149    }
150}
151#[doc = "Field `ITBUFEN` reader - Buffer interrupt enable"]
152pub type ITBUFEN_R = crate::BitReader<ITBUFEN_A>;
153impl ITBUFEN_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> ITBUFEN_A {
157        match self.bits {
158            false => ITBUFEN_A::Disabled,
159            true => ITBUFEN_A::Enabled,
160        }
161    }
162    #[doc = "Checks if the value of the field is `Disabled`"]
163    #[inline(always)]
164    pub fn is_disabled(&self) -> bool {
165        *self == ITBUFEN_A::Disabled
166    }
167    #[doc = "Checks if the value of the field is `Enabled`"]
168    #[inline(always)]
169    pub fn is_enabled(&self) -> bool {
170        *self == ITBUFEN_A::Enabled
171    }
172}
173#[doc = "Field `ITBUFEN` writer - Buffer interrupt enable"]
174pub type ITBUFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, ITBUFEN_A, O>;
175impl<'a, const O: u8> ITBUFEN_W<'a, O> {
176    #[doc = "TxE=1 or RxNE=1 does not generate any interrupt"]
177    #[inline(always)]
178    pub fn disabled(self) -> &'a mut W {
179        self.variant(ITBUFEN_A::Disabled)
180    }
181    #[doc = "TxE=1 or RxNE=1 generates Event interrupt"]
182    #[inline(always)]
183    pub fn enabled(self) -> &'a mut W {
184        self.variant(ITBUFEN_A::Enabled)
185    }
186}
187#[doc = "Event interrupt enable\n\nValue on reset: 0"]
188#[derive(Clone, Copy, Debug, PartialEq)]
189pub enum ITEVTEN_A {
190    #[doc = "0: Event interrupt disabled"]
191    Disabled = 0,
192    #[doc = "1: Event interrupt enabled"]
193    Enabled = 1,
194}
195impl From<ITEVTEN_A> for bool {
196    #[inline(always)]
197    fn from(variant: ITEVTEN_A) -> Self {
198        variant as u8 != 0
199    }
200}
201#[doc = "Field `ITEVTEN` reader - Event interrupt enable"]
202pub type ITEVTEN_R = crate::BitReader<ITEVTEN_A>;
203impl ITEVTEN_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> ITEVTEN_A {
207        match self.bits {
208            false => ITEVTEN_A::Disabled,
209            true => ITEVTEN_A::Enabled,
210        }
211    }
212    #[doc = "Checks if the value of the field is `Disabled`"]
213    #[inline(always)]
214    pub fn is_disabled(&self) -> bool {
215        *self == ITEVTEN_A::Disabled
216    }
217    #[doc = "Checks if the value of the field is `Enabled`"]
218    #[inline(always)]
219    pub fn is_enabled(&self) -> bool {
220        *self == ITEVTEN_A::Enabled
221    }
222}
223#[doc = "Field `ITEVTEN` writer - Event interrupt enable"]
224pub type ITEVTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, ITEVTEN_A, O>;
225impl<'a, const O: u8> ITEVTEN_W<'a, O> {
226    #[doc = "Event interrupt disabled"]
227    #[inline(always)]
228    pub fn disabled(self) -> &'a mut W {
229        self.variant(ITEVTEN_A::Disabled)
230    }
231    #[doc = "Event interrupt enabled"]
232    #[inline(always)]
233    pub fn enabled(self) -> &'a mut W {
234        self.variant(ITEVTEN_A::Enabled)
235    }
236}
237#[doc = "Error interrupt enable\n\nValue on reset: 0"]
238#[derive(Clone, Copy, Debug, PartialEq)]
239pub enum ITERREN_A {
240    #[doc = "0: Error interrupt disabled"]
241    Disabled = 0,
242    #[doc = "1: Error interrupt enabled"]
243    Enabled = 1,
244}
245impl From<ITERREN_A> for bool {
246    #[inline(always)]
247    fn from(variant: ITERREN_A) -> Self {
248        variant as u8 != 0
249    }
250}
251#[doc = "Field `ITERREN` reader - Error interrupt enable"]
252pub type ITERREN_R = crate::BitReader<ITERREN_A>;
253impl ITERREN_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub fn variant(&self) -> ITERREN_A {
257        match self.bits {
258            false => ITERREN_A::Disabled,
259            true => ITERREN_A::Enabled,
260        }
261    }
262    #[doc = "Checks if the value of the field is `Disabled`"]
263    #[inline(always)]
264    pub fn is_disabled(&self) -> bool {
265        *self == ITERREN_A::Disabled
266    }
267    #[doc = "Checks if the value of the field is `Enabled`"]
268    #[inline(always)]
269    pub fn is_enabled(&self) -> bool {
270        *self == ITERREN_A::Enabled
271    }
272}
273#[doc = "Field `ITERREN` writer - Error interrupt enable"]
274pub type ITERREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, ITERREN_A, O>;
275impl<'a, const O: u8> ITERREN_W<'a, O> {
276    #[doc = "Error interrupt disabled"]
277    #[inline(always)]
278    pub fn disabled(self) -> &'a mut W {
279        self.variant(ITERREN_A::Disabled)
280    }
281    #[doc = "Error interrupt enabled"]
282    #[inline(always)]
283    pub fn enabled(self) -> &'a mut W {
284        self.variant(ITERREN_A::Enabled)
285    }
286}
287#[doc = "Field `FREQ` reader - Peripheral clock frequency"]
288pub type FREQ_R = crate::FieldReader<u8, u8>;
289#[doc = "Field `FREQ` writer - Peripheral clock frequency"]
290pub type FREQ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CR2_SPEC, u8, u8, 6, O>;
291impl R {
292    #[doc = "Bit 12 - DMA last transfer"]
293    #[inline(always)]
294    pub fn last(&self) -> LAST_R {
295        LAST_R::new(((self.bits >> 12) & 1) != 0)
296    }
297    #[doc = "Bit 11 - DMA requests enable"]
298    #[inline(always)]
299    pub fn dmaen(&self) -> DMAEN_R {
300        DMAEN_R::new(((self.bits >> 11) & 1) != 0)
301    }
302    #[doc = "Bit 10 - Buffer interrupt enable"]
303    #[inline(always)]
304    pub fn itbufen(&self) -> ITBUFEN_R {
305        ITBUFEN_R::new(((self.bits >> 10) & 1) != 0)
306    }
307    #[doc = "Bit 9 - Event interrupt enable"]
308    #[inline(always)]
309    pub fn itevten(&self) -> ITEVTEN_R {
310        ITEVTEN_R::new(((self.bits >> 9) & 1) != 0)
311    }
312    #[doc = "Bit 8 - Error interrupt enable"]
313    #[inline(always)]
314    pub fn iterren(&self) -> ITERREN_R {
315        ITERREN_R::new(((self.bits >> 8) & 1) != 0)
316    }
317    #[doc = "Bits 0:5 - Peripheral clock frequency"]
318    #[inline(always)]
319    pub fn freq(&self) -> FREQ_R {
320        FREQ_R::new((self.bits & 0x3f) as u8)
321    }
322}
323impl W {
324    #[doc = "Bit 12 - DMA last transfer"]
325    #[inline(always)]
326    pub fn last(&mut self) -> LAST_W<12> {
327        LAST_W::new(self)
328    }
329    #[doc = "Bit 11 - DMA requests enable"]
330    #[inline(always)]
331    pub fn dmaen(&mut self) -> DMAEN_W<11> {
332        DMAEN_W::new(self)
333    }
334    #[doc = "Bit 10 - Buffer interrupt enable"]
335    #[inline(always)]
336    pub fn itbufen(&mut self) -> ITBUFEN_W<10> {
337        ITBUFEN_W::new(self)
338    }
339    #[doc = "Bit 9 - Event interrupt enable"]
340    #[inline(always)]
341    pub fn itevten(&mut self) -> ITEVTEN_W<9> {
342        ITEVTEN_W::new(self)
343    }
344    #[doc = "Bit 8 - Error interrupt enable"]
345    #[inline(always)]
346    pub fn iterren(&mut self) -> ITERREN_W<8> {
347        ITERREN_W::new(self)
348    }
349    #[doc = "Bits 0:5 - Peripheral clock frequency"]
350    #[inline(always)]
351    pub fn freq(&mut self) -> FREQ_W<0> {
352        FREQ_W::new(self)
353    }
354    #[doc = "Writes raw bits to the register."]
355    #[inline(always)]
356    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
357        self.0.bits(bits);
358        self
359    }
360}
361#[doc = "Control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](index.html) module"]
362pub struct CR2_SPEC;
363impl crate::RegisterSpec for CR2_SPEC {
364    type Ux = u32;
365}
366#[doc = "`read()` method returns [cr2::R](R) reader structure"]
367impl crate::Readable for CR2_SPEC {
368    type Reader = R;
369}
370#[doc = "`write(|w| ..)` method takes [cr2::W](W) writer structure"]
371impl crate::Writable for CR2_SPEC {
372    type Writer = W;
373}
374#[doc = "`reset()` method sets CR2 to value 0"]
375impl crate::Resettable for CR2_SPEC {
376    #[inline(always)]
377    fn reset_value() -> Self::Ux {
378        0
379    }
380}
stm32f1/stm32f103/i2c1/cr2.rs

stm32f1/stm32f103/i2c1/
cr2.rs
