stm32f1/stm32f103/fsmc/
sr4.rs

1#[doc = "Register `SR4` reader"]
2pub struct R(crate::R<SR4_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SR4_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SR4_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SR4_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SR4` writer"]
17pub struct W(crate::W<SR4_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SR4_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SR4_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SR4_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `FEMPT` reader - FEMPT"]
38pub type FEMPT_R = crate::BitReader<bool>;
39#[doc = "Field `IFEN` reader - IFEN"]
40pub type IFEN_R = crate::BitReader<bool>;
41#[doc = "Field `IFEN` writer - IFEN"]
42pub type IFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SR4_SPEC, bool, O>;
43#[doc = "Field `ILEN` reader - ILEN"]
44pub type ILEN_R = crate::BitReader<bool>;
45#[doc = "Field `ILEN` writer - ILEN"]
46pub type ILEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SR4_SPEC, bool, O>;
47#[doc = "Field `IREN` reader - IREN"]
48pub type IREN_R = crate::BitReader<bool>;
49#[doc = "Field `IREN` writer - IREN"]
50pub type IREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SR4_SPEC, bool, O>;
51#[doc = "Field `IFS` reader - IFS"]
52pub type IFS_R = crate::BitReader<bool>;
53#[doc = "Field `IFS` writer - IFS"]
54pub type IFS_W<'a, const O: u8> = crate::BitWriter<'a, u32, SR4_SPEC, bool, O>;
55#[doc = "Field `ILS` reader - ILS"]
56pub type ILS_R = crate::BitReader<bool>;
57#[doc = "Field `ILS` writer - ILS"]
58pub type ILS_W<'a, const O: u8> = crate::BitWriter<'a, u32, SR4_SPEC, bool, O>;
59#[doc = "Field `IRS` reader - IRS"]
60pub type IRS_R = crate::BitReader<bool>;
61#[doc = "Field `IRS` writer - IRS"]
62pub type IRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, SR4_SPEC, bool, O>;
63impl R {
64    #[doc = "Bit 6 - FEMPT"]
65    #[inline(always)]
66    pub fn fempt(&self) -> FEMPT_R {
67        FEMPT_R::new(((self.bits >> 6) & 1) != 0)
68    }
69    #[doc = "Bit 5 - IFEN"]
70    #[inline(always)]
71    pub fn ifen(&self) -> IFEN_R {
72        IFEN_R::new(((self.bits >> 5) & 1) != 0)
73    }
74    #[doc = "Bit 4 - ILEN"]
75    #[inline(always)]
76    pub fn ilen(&self) -> ILEN_R {
77        ILEN_R::new(((self.bits >> 4) & 1) != 0)
78    }
79    #[doc = "Bit 3 - IREN"]
80    #[inline(always)]
81    pub fn iren(&self) -> IREN_R {
82        IREN_R::new(((self.bits >> 3) & 1) != 0)
83    }
84    #[doc = "Bit 2 - IFS"]
85    #[inline(always)]
86    pub fn ifs(&self) -> IFS_R {
87        IFS_R::new(((self.bits >> 2) & 1) != 0)
88    }
89    #[doc = "Bit 1 - ILS"]
90    #[inline(always)]
91    pub fn ils(&self) -> ILS_R {
92        ILS_R::new(((self.bits >> 1) & 1) != 0)
93    }
94    #[doc = "Bit 0 - IRS"]
95    #[inline(always)]
96    pub fn irs(&self) -> IRS_R {
97        IRS_R::new((self.bits & 1) != 0)
98    }
99}
100impl W {
101    #[doc = "Bit 5 - IFEN"]
102    #[inline(always)]
103    pub fn ifen(&mut self) -> IFEN_W<5> {
104        IFEN_W::new(self)
105    }
106    #[doc = "Bit 4 - ILEN"]
107    #[inline(always)]
108    pub fn ilen(&mut self) -> ILEN_W<4> {
109        ILEN_W::new(self)
110    }
111    #[doc = "Bit 3 - IREN"]
112    #[inline(always)]
113    pub fn iren(&mut self) -> IREN_W<3> {
114        IREN_W::new(self)
115    }
116    #[doc = "Bit 2 - IFS"]
117    #[inline(always)]
118    pub fn ifs(&mut self) -> IFS_W<2> {
119        IFS_W::new(self)
120    }
121    #[doc = "Bit 1 - ILS"]
122    #[inline(always)]
123    pub fn ils(&mut self) -> ILS_W<1> {
124        ILS_W::new(self)
125    }
126    #[doc = "Bit 0 - IRS"]
127    #[inline(always)]
128    pub fn irs(&mut self) -> IRS_W<0> {
129        IRS_W::new(self)
130    }
131    #[doc = "Writes raw bits to the register."]
132    #[inline(always)]
133    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
134        self.0.bits(bits);
135        self
136    }
137}
138#[doc = "FIFO status and interrupt register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr4](index.html) module"]
139pub struct SR4_SPEC;
140impl crate::RegisterSpec for SR4_SPEC {
141    type Ux = u32;
142}
143#[doc = "`read()` method returns [sr4::R](R) reader structure"]
144impl crate::Readable for SR4_SPEC {
145    type Reader = R;
146}
147#[doc = "`write(|w| ..)` method takes [sr4::W](W) writer structure"]
148impl crate::Writable for SR4_SPEC {
149    type Writer = W;
150}
151#[doc = "`reset()` method sets SR4 to value 0x40"]
152impl crate::Resettable for SR4_SPEC {
153    #[inline(always)]
154    fn reset_value() -> Self::Ux {
155        0x40
156    }
157}
stm32f1/stm32f103/fsmc/sr4.rs

stm32f1/stm32f103/fsmc/
sr4.rs
