1#[doc = "Register `CR2` reader"]
2pub struct R(crate::R<CR2_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CR2_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CR2_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CR2_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CR2` writer"]
17pub struct W(crate::W<CR2_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CR2_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CR2_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CR2_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Temperature sensor and VREFINT enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum TSVREFE_A {
40 #[doc = "0: Temperature sensor and V_REFINT channel disabled"]
41 Disabled = 0,
42 #[doc = "1: Temperature sensor and V_REFINT channel enabled"]
43 Enabled = 1,
44}
45impl From<TSVREFE_A> for bool {
46 #[inline(always)]
47 fn from(variant: TSVREFE_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `TSVREFE` reader - Temperature sensor and VREFINT enable"]
52pub type TSVREFE_R = crate::BitReader<TSVREFE_A>;
53impl TSVREFE_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> TSVREFE_A {
57 match self.bits {
58 false => TSVREFE_A::Disabled,
59 true => TSVREFE_A::Enabled,
60 }
61 }
62 #[doc = "Checks if the value of the field is `Disabled`"]
63 #[inline(always)]
64 pub fn is_disabled(&self) -> bool {
65 *self == TSVREFE_A::Disabled
66 }
67 #[doc = "Checks if the value of the field is `Enabled`"]
68 #[inline(always)]
69 pub fn is_enabled(&self) -> bool {
70 *self == TSVREFE_A::Enabled
71 }
72}
73#[doc = "Field `TSVREFE` writer - Temperature sensor and VREFINT enable"]
74pub type TSVREFE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, TSVREFE_A, O>;
75impl<'a, const O: u8> TSVREFE_W<'a, O> {
76 #[doc = "Temperature sensor and V_REFINT channel disabled"]
77 #[inline(always)]
78 pub fn disabled(self) -> &'a mut W {
79 self.variant(TSVREFE_A::Disabled)
80 }
81 #[doc = "Temperature sensor and V_REFINT channel enabled"]
82 #[inline(always)]
83 pub fn enabled(self) -> &'a mut W {
84 self.variant(TSVREFE_A::Enabled)
85 }
86}
87#[doc = "Start conversion of regular channels\n\nValue on reset: 0"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum SWSTART_A {
90 #[doc = "0: Reset state"]
91 Started = 0,
92 #[doc = "1: Starting conversion of regular channels"]
93 NotStarted = 1,
94}
95impl From<SWSTART_A> for bool {
96 #[inline(always)]
97 fn from(variant: SWSTART_A) -> Self {
98 variant as u8 != 0
99 }
100}
101#[doc = "Field `SWSTART` reader - Start conversion of regular channels"]
102pub type SWSTART_R = crate::BitReader<SWSTART_A>;
103impl SWSTART_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> SWSTART_A {
107 match self.bits {
108 false => SWSTART_A::Started,
109 true => SWSTART_A::NotStarted,
110 }
111 }
112 #[doc = "Checks if the value of the field is `Started`"]
113 #[inline(always)]
114 pub fn is_started(&self) -> bool {
115 *self == SWSTART_A::Started
116 }
117 #[doc = "Checks if the value of the field is `NotStarted`"]
118 #[inline(always)]
119 pub fn is_not_started(&self) -> bool {
120 *self == SWSTART_A::NotStarted
121 }
122}
123#[doc = "Start conversion of regular channels\n\nValue on reset: 0"]
124#[derive(Clone, Copy, Debug, PartialEq)]
125pub enum SWSTART_AW {
126 #[doc = "1: Start conversion of regular channels"]
127 Start = 1,
128}
129impl From<SWSTART_AW> for bool {
130 #[inline(always)]
131 fn from(variant: SWSTART_AW) -> Self {
132 variant as u8 != 0
133 }
134}
135#[doc = "Field `SWSTART` writer - Start conversion of regular channels"]
136pub type SWSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, SWSTART_AW, O>;
137impl<'a, const O: u8> SWSTART_W<'a, O> {
138 #[doc = "Start conversion of regular channels"]
139 #[inline(always)]
140 pub fn start(self) -> &'a mut W {
141 self.variant(SWSTART_AW::Start)
142 }
143}
144#[doc = "Start conversion of injected channels\n\nValue on reset: 0"]
145#[derive(Clone, Copy, Debug, PartialEq)]
146pub enum JSWSTART_A {
147 #[doc = "0: Reset state"]
148 Started = 0,
149 #[doc = "1: Starting conversion of injected channels"]
150 NotStarted = 1,
151}
152impl From<JSWSTART_A> for bool {
153 #[inline(always)]
154 fn from(variant: JSWSTART_A) -> Self {
155 variant as u8 != 0
156 }
157}
158#[doc = "Field `JSWSTART` reader - Start conversion of injected channels"]
159pub type JSWSTART_R = crate::BitReader<JSWSTART_A>;
160impl JSWSTART_R {
161 #[doc = "Get enumerated values variant"]
162 #[inline(always)]
163 pub fn variant(&self) -> JSWSTART_A {
164 match self.bits {
165 false => JSWSTART_A::Started,
166 true => JSWSTART_A::NotStarted,
167 }
168 }
169 #[doc = "Checks if the value of the field is `Started`"]
170 #[inline(always)]
171 pub fn is_started(&self) -> bool {
172 *self == JSWSTART_A::Started
173 }
174 #[doc = "Checks if the value of the field is `NotStarted`"]
175 #[inline(always)]
176 pub fn is_not_started(&self) -> bool {
177 *self == JSWSTART_A::NotStarted
178 }
179}
180#[doc = "Start conversion of injected channels\n\nValue on reset: 0"]
181#[derive(Clone, Copy, Debug, PartialEq)]
182pub enum JSWSTART_AW {
183 #[doc = "1: Start conversion of injected channels"]
184 Start = 1,
185}
186impl From<JSWSTART_AW> for bool {
187 #[inline(always)]
188 fn from(variant: JSWSTART_AW) -> Self {
189 variant as u8 != 0
190 }
191}
192#[doc = "Field `JSWSTART` writer - Start conversion of injected channels"]
193pub type JSWSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, JSWSTART_AW, O>;
194impl<'a, const O: u8> JSWSTART_W<'a, O> {
195 #[doc = "Start conversion of injected channels"]
196 #[inline(always)]
197 pub fn start(self) -> &'a mut W {
198 self.variant(JSWSTART_AW::Start)
199 }
200}
201#[doc = "External trigger conversion mode for regular channels\n\nValue on reset: 0"]
202#[derive(Clone, Copy, Debug, PartialEq)]
203pub enum EXTTRIG_A {
204 #[doc = "0: Conversion on external event disabled"]
205 Disabled = 0,
206 #[doc = "1: Conversion on external event enabled"]
207 Enabled = 1,
208}
209impl From<EXTTRIG_A> for bool {
210 #[inline(always)]
211 fn from(variant: EXTTRIG_A) -> Self {
212 variant as u8 != 0
213 }
214}
215#[doc = "Field `EXTTRIG` reader - External trigger conversion mode for regular channels"]
216pub type EXTTRIG_R = crate::BitReader<EXTTRIG_A>;
217impl EXTTRIG_R {
218 #[doc = "Get enumerated values variant"]
219 #[inline(always)]
220 pub fn variant(&self) -> EXTTRIG_A {
221 match self.bits {
222 false => EXTTRIG_A::Disabled,
223 true => EXTTRIG_A::Enabled,
224 }
225 }
226 #[doc = "Checks if the value of the field is `Disabled`"]
227 #[inline(always)]
228 pub fn is_disabled(&self) -> bool {
229 *self == EXTTRIG_A::Disabled
230 }
231 #[doc = "Checks if the value of the field is `Enabled`"]
232 #[inline(always)]
233 pub fn is_enabled(&self) -> bool {
234 *self == EXTTRIG_A::Enabled
235 }
236}
237#[doc = "Field `EXTTRIG` writer - External trigger conversion mode for regular channels"]
238pub type EXTTRIG_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, EXTTRIG_A, O>;
239impl<'a, const O: u8> EXTTRIG_W<'a, O> {
240 #[doc = "Conversion on external event disabled"]
241 #[inline(always)]
242 pub fn disabled(self) -> &'a mut W {
243 self.variant(EXTTRIG_A::Disabled)
244 }
245 #[doc = "Conversion on external event enabled"]
246 #[inline(always)]
247 pub fn enabled(self) -> &'a mut W {
248 self.variant(EXTTRIG_A::Enabled)
249 }
250}
251#[doc = "External event select for regular group\n\nValue on reset: 0"]
252#[derive(Clone, Copy, Debug, PartialEq)]
253#[repr(u8)]
254pub enum EXTSEL_A {
255 #[doc = "0: Timer 3 CC1 event"]
256 Tim3cc1 = 0,
257 #[doc = "1: Timer 2 CC3 event"]
258 Tim2cc3 = 1,
259 #[doc = "2: Timer 1 CC3 event"]
260 Tim1cc3 = 2,
261 #[doc = "3: Timer 8 CC1 event"]
262 Tim8cc1 = 3,
263 #[doc = "4: Timer 8 TRGO event"]
264 Tim8trgo = 4,
265 #[doc = "5: Timer 5 CC1 event"]
266 Tim5cc1 = 5,
267 #[doc = "6: Timer 5 CC3 event"]
268 Tim5cc3 = 6,
269 #[doc = "7: SWSTART"]
270 Swstart = 7,
271}
272impl From<EXTSEL_A> for u8 {
273 #[inline(always)]
274 fn from(variant: EXTSEL_A) -> Self {
275 variant as _
276 }
277}
278#[doc = "Field `EXTSEL` reader - External event select for regular group"]
279pub type EXTSEL_R = crate::FieldReader<u8, EXTSEL_A>;
280impl EXTSEL_R {
281 #[doc = "Get enumerated values variant"]
282 #[inline(always)]
283 pub fn variant(&self) -> EXTSEL_A {
284 match self.bits {
285 0 => EXTSEL_A::Tim3cc1,
286 1 => EXTSEL_A::Tim2cc3,
287 2 => EXTSEL_A::Tim1cc3,
288 3 => EXTSEL_A::Tim8cc1,
289 4 => EXTSEL_A::Tim8trgo,
290 5 => EXTSEL_A::Tim5cc1,
291 6 => EXTSEL_A::Tim5cc3,
292 7 => EXTSEL_A::Swstart,
293 _ => unreachable!(),
294 }
295 }
296 #[doc = "Checks if the value of the field is `Tim3cc1`"]
297 #[inline(always)]
298 pub fn is_tim3cc1(&self) -> bool {
299 *self == EXTSEL_A::Tim3cc1
300 }
301 #[doc = "Checks if the value of the field is `Tim2cc3`"]
302 #[inline(always)]
303 pub fn is_tim2cc3(&self) -> bool {
304 *self == EXTSEL_A::Tim2cc3
305 }
306 #[doc = "Checks if the value of the field is `Tim1cc3`"]
307 #[inline(always)]
308 pub fn is_tim1cc3(&self) -> bool {
309 *self == EXTSEL_A::Tim1cc3
310 }
311 #[doc = "Checks if the value of the field is `Tim8cc1`"]
312 #[inline(always)]
313 pub fn is_tim8cc1(&self) -> bool {
314 *self == EXTSEL_A::Tim8cc1
315 }
316 #[doc = "Checks if the value of the field is `Tim8trgo`"]
317 #[inline(always)]
318 pub fn is_tim8trgo(&self) -> bool {
319 *self == EXTSEL_A::Tim8trgo
320 }
321 #[doc = "Checks if the value of the field is `Tim5cc1`"]
322 #[inline(always)]
323 pub fn is_tim5cc1(&self) -> bool {
324 *self == EXTSEL_A::Tim5cc1
325 }
326 #[doc = "Checks if the value of the field is `Tim5cc3`"]
327 #[inline(always)]
328 pub fn is_tim5cc3(&self) -> bool {
329 *self == EXTSEL_A::Tim5cc3
330 }
331 #[doc = "Checks if the value of the field is `Swstart`"]
332 #[inline(always)]
333 pub fn is_swstart(&self) -> bool {
334 *self == EXTSEL_A::Swstart
335 }
336}
337#[doc = "Field `EXTSEL` writer - External event select for regular group"]
338pub type EXTSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CR2_SPEC, u8, EXTSEL_A, 3, O>;
339impl<'a, const O: u8> EXTSEL_W<'a, O> {
340 #[doc = "Timer 3 CC1 event"]
341 #[inline(always)]
342 pub fn tim3cc1(self) -> &'a mut W {
343 self.variant(EXTSEL_A::Tim3cc1)
344 }
345 #[doc = "Timer 2 CC3 event"]
346 #[inline(always)]
347 pub fn tim2cc3(self) -> &'a mut W {
348 self.variant(EXTSEL_A::Tim2cc3)
349 }
350 #[doc = "Timer 1 CC3 event"]
351 #[inline(always)]
352 pub fn tim1cc3(self) -> &'a mut W {
353 self.variant(EXTSEL_A::Tim1cc3)
354 }
355 #[doc = "Timer 8 CC1 event"]
356 #[inline(always)]
357 pub fn tim8cc1(self) -> &'a mut W {
358 self.variant(EXTSEL_A::Tim8cc1)
359 }
360 #[doc = "Timer 8 TRGO event"]
361 #[inline(always)]
362 pub fn tim8trgo(self) -> &'a mut W {
363 self.variant(EXTSEL_A::Tim8trgo)
364 }
365 #[doc = "Timer 5 CC1 event"]
366 #[inline(always)]
367 pub fn tim5cc1(self) -> &'a mut W {
368 self.variant(EXTSEL_A::Tim5cc1)
369 }
370 #[doc = "Timer 5 CC3 event"]
371 #[inline(always)]
372 pub fn tim5cc3(self) -> &'a mut W {
373 self.variant(EXTSEL_A::Tim5cc3)
374 }
375 #[doc = "SWSTART"]
376 #[inline(always)]
377 pub fn swstart(self) -> &'a mut W {
378 self.variant(EXTSEL_A::Swstart)
379 }
380}
381#[doc = "External trigger conversion mode for injected channels\n\nValue on reset: 0"]
382#[derive(Clone, Copy, Debug, PartialEq)]
383pub enum JEXTTRIG_A {
384 #[doc = "0: Conversion on external event disabled"]
385 Disabled = 0,
386 #[doc = "1: Conversion on external event enabled"]
387 Enabled = 1,
388}
389impl From<JEXTTRIG_A> for bool {
390 #[inline(always)]
391 fn from(variant: JEXTTRIG_A) -> Self {
392 variant as u8 != 0
393 }
394}
395#[doc = "Field `JEXTTRIG` reader - External trigger conversion mode for injected channels"]
396pub type JEXTTRIG_R = crate::BitReader<JEXTTRIG_A>;
397impl JEXTTRIG_R {
398 #[doc = "Get enumerated values variant"]
399 #[inline(always)]
400 pub fn variant(&self) -> JEXTTRIG_A {
401 match self.bits {
402 false => JEXTTRIG_A::Disabled,
403 true => JEXTTRIG_A::Enabled,
404 }
405 }
406 #[doc = "Checks if the value of the field is `Disabled`"]
407 #[inline(always)]
408 pub fn is_disabled(&self) -> bool {
409 *self == JEXTTRIG_A::Disabled
410 }
411 #[doc = "Checks if the value of the field is `Enabled`"]
412 #[inline(always)]
413 pub fn is_enabled(&self) -> bool {
414 *self == JEXTTRIG_A::Enabled
415 }
416}
417#[doc = "Field `JEXTTRIG` writer - External trigger conversion mode for injected channels"]
418pub type JEXTTRIG_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, JEXTTRIG_A, O>;
419impl<'a, const O: u8> JEXTTRIG_W<'a, O> {
420 #[doc = "Conversion on external event disabled"]
421 #[inline(always)]
422 pub fn disabled(self) -> &'a mut W {
423 self.variant(JEXTTRIG_A::Disabled)
424 }
425 #[doc = "Conversion on external event enabled"]
426 #[inline(always)]
427 pub fn enabled(self) -> &'a mut W {
428 self.variant(JEXTTRIG_A::Enabled)
429 }
430}
431#[doc = "External event select for injected group\n\nValue on reset: 0"]
432#[derive(Clone, Copy, Debug, PartialEq)]
433#[repr(u8)]
434pub enum JEXTSEL_A {
435 #[doc = "0: Timer 1 TRGO event"]
436 Tim1trgo = 0,
437 #[doc = "1: Timer 1 CC4 event"]
438 Tim1cc4 = 1,
439 #[doc = "2: Timer 4 CC3 event"]
440 Tim4cc3 = 2,
441 #[doc = "3: Timer 8 CC2 event"]
442 Tim8cc2 = 3,
443 #[doc = "4: Timer 8 CC4 event"]
444 Tim8cc4 = 4,
445 #[doc = "5: Timer 5 TRGO event"]
446 Tim5trgo = 5,
447 #[doc = "6: Timer 5 CC4 event"]
448 Tim5cc4 = 6,
449 #[doc = "7: JSWSTART"]
450 Jswstart = 7,
451}
452impl From<JEXTSEL_A> for u8 {
453 #[inline(always)]
454 fn from(variant: JEXTSEL_A) -> Self {
455 variant as _
456 }
457}
458#[doc = "Field `JEXTSEL` reader - External event select for injected group"]
459pub type JEXTSEL_R = crate::FieldReader<u8, JEXTSEL_A>;
460impl JEXTSEL_R {
461 #[doc = "Get enumerated values variant"]
462 #[inline(always)]
463 pub fn variant(&self) -> JEXTSEL_A {
464 match self.bits {
465 0 => JEXTSEL_A::Tim1trgo,
466 1 => JEXTSEL_A::Tim1cc4,
467 2 => JEXTSEL_A::Tim4cc3,
468 3 => JEXTSEL_A::Tim8cc2,
469 4 => JEXTSEL_A::Tim8cc4,
470 5 => JEXTSEL_A::Tim5trgo,
471 6 => JEXTSEL_A::Tim5cc4,
472 7 => JEXTSEL_A::Jswstart,
473 _ => unreachable!(),
474 }
475 }
476 #[doc = "Checks if the value of the field is `Tim1trgo`"]
477 #[inline(always)]
478 pub fn is_tim1trgo(&self) -> bool {
479 *self == JEXTSEL_A::Tim1trgo
480 }
481 #[doc = "Checks if the value of the field is `Tim1cc4`"]
482 #[inline(always)]
483 pub fn is_tim1cc4(&self) -> bool {
484 *self == JEXTSEL_A::Tim1cc4
485 }
486 #[doc = "Checks if the value of the field is `Tim4cc3`"]
487 #[inline(always)]
488 pub fn is_tim4cc3(&self) -> bool {
489 *self == JEXTSEL_A::Tim4cc3
490 }
491 #[doc = "Checks if the value of the field is `Tim8cc2`"]
492 #[inline(always)]
493 pub fn is_tim8cc2(&self) -> bool {
494 *self == JEXTSEL_A::Tim8cc2
495 }
496 #[doc = "Checks if the value of the field is `Tim8cc4`"]
497 #[inline(always)]
498 pub fn is_tim8cc4(&self) -> bool {
499 *self == JEXTSEL_A::Tim8cc4
500 }
501 #[doc = "Checks if the value of the field is `Tim5trgo`"]
502 #[inline(always)]
503 pub fn is_tim5trgo(&self) -> bool {
504 *self == JEXTSEL_A::Tim5trgo
505 }
506 #[doc = "Checks if the value of the field is `Tim5cc4`"]
507 #[inline(always)]
508 pub fn is_tim5cc4(&self) -> bool {
509 *self == JEXTSEL_A::Tim5cc4
510 }
511 #[doc = "Checks if the value of the field is `Jswstart`"]
512 #[inline(always)]
513 pub fn is_jswstart(&self) -> bool {
514 *self == JEXTSEL_A::Jswstart
515 }
516}
517#[doc = "Field `JEXTSEL` writer - External event select for injected group"]
518pub type JEXTSEL_W<'a, const O: u8> =
519 crate::FieldWriterSafe<'a, u32, CR2_SPEC, u8, JEXTSEL_A, 3, O>;
520impl<'a, const O: u8> JEXTSEL_W<'a, O> {
521 #[doc = "Timer 1 TRGO event"]
522 #[inline(always)]
523 pub fn tim1trgo(self) -> &'a mut W {
524 self.variant(JEXTSEL_A::Tim1trgo)
525 }
526 #[doc = "Timer 1 CC4 event"]
527 #[inline(always)]
528 pub fn tim1cc4(self) -> &'a mut W {
529 self.variant(JEXTSEL_A::Tim1cc4)
530 }
531 #[doc = "Timer 4 CC3 event"]
532 #[inline(always)]
533 pub fn tim4cc3(self) -> &'a mut W {
534 self.variant(JEXTSEL_A::Tim4cc3)
535 }
536 #[doc = "Timer 8 CC2 event"]
537 #[inline(always)]
538 pub fn tim8cc2(self) -> &'a mut W {
539 self.variant(JEXTSEL_A::Tim8cc2)
540 }
541 #[doc = "Timer 8 CC4 event"]
542 #[inline(always)]
543 pub fn tim8cc4(self) -> &'a mut W {
544 self.variant(JEXTSEL_A::Tim8cc4)
545 }
546 #[doc = "Timer 5 TRGO event"]
547 #[inline(always)]
548 pub fn tim5trgo(self) -> &'a mut W {
549 self.variant(JEXTSEL_A::Tim5trgo)
550 }
551 #[doc = "Timer 5 CC4 event"]
552 #[inline(always)]
553 pub fn tim5cc4(self) -> &'a mut W {
554 self.variant(JEXTSEL_A::Tim5cc4)
555 }
556 #[doc = "JSWSTART"]
557 #[inline(always)]
558 pub fn jswstart(self) -> &'a mut W {
559 self.variant(JEXTSEL_A::Jswstart)
560 }
561}
562#[doc = "Data alignment\n\nValue on reset: 0"]
563#[derive(Clone, Copy, Debug, PartialEq)]
564pub enum ALIGN_A {
565 #[doc = "0: Right Alignment"]
566 Right = 0,
567 #[doc = "1: Left Alignment"]
568 Left = 1,
569}
570impl From<ALIGN_A> for bool {
571 #[inline(always)]
572 fn from(variant: ALIGN_A) -> Self {
573 variant as u8 != 0
574 }
575}
576#[doc = "Field `ALIGN` reader - Data alignment"]
577pub type ALIGN_R = crate::BitReader<ALIGN_A>;
578impl ALIGN_R {
579 #[doc = "Get enumerated values variant"]
580 #[inline(always)]
581 pub fn variant(&self) -> ALIGN_A {
582 match self.bits {
583 false => ALIGN_A::Right,
584 true => ALIGN_A::Left,
585 }
586 }
587 #[doc = "Checks if the value of the field is `Right`"]
588 #[inline(always)]
589 pub fn is_right(&self) -> bool {
590 *self == ALIGN_A::Right
591 }
592 #[doc = "Checks if the value of the field is `Left`"]
593 #[inline(always)]
594 pub fn is_left(&self) -> bool {
595 *self == ALIGN_A::Left
596 }
597}
598#[doc = "Field `ALIGN` writer - Data alignment"]
599pub type ALIGN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, ALIGN_A, O>;
600impl<'a, const O: u8> ALIGN_W<'a, O> {
601 #[doc = "Right Alignment"]
602 #[inline(always)]
603 pub fn right(self) -> &'a mut W {
604 self.variant(ALIGN_A::Right)
605 }
606 #[doc = "Left Alignment"]
607 #[inline(always)]
608 pub fn left(self) -> &'a mut W {
609 self.variant(ALIGN_A::Left)
610 }
611}
612#[doc = "Direct memory access mode\n\nValue on reset: 0"]
613#[derive(Clone, Copy, Debug, PartialEq)]
614pub enum DMA_A {
615 #[doc = "0: DMA mode disabled"]
616 Disabled = 0,
617 #[doc = "1: DMA mode enabled"]
618 Enabled = 1,
619}
620impl From<DMA_A> for bool {
621 #[inline(always)]
622 fn from(variant: DMA_A) -> Self {
623 variant as u8 != 0
624 }
625}
626#[doc = "Field `DMA` reader - Direct memory access mode"]
627pub type DMA_R = crate::BitReader<DMA_A>;
628impl DMA_R {
629 #[doc = "Get enumerated values variant"]
630 #[inline(always)]
631 pub fn variant(&self) -> DMA_A {
632 match self.bits {
633 false => DMA_A::Disabled,
634 true => DMA_A::Enabled,
635 }
636 }
637 #[doc = "Checks if the value of the field is `Disabled`"]
638 #[inline(always)]
639 pub fn is_disabled(&self) -> bool {
640 *self == DMA_A::Disabled
641 }
642 #[doc = "Checks if the value of the field is `Enabled`"]
643 #[inline(always)]
644 pub fn is_enabled(&self) -> bool {
645 *self == DMA_A::Enabled
646 }
647}
648#[doc = "Field `DMA` writer - Direct memory access mode"]
649pub type DMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, DMA_A, O>;
650impl<'a, const O: u8> DMA_W<'a, O> {
651 #[doc = "DMA mode disabled"]
652 #[inline(always)]
653 pub fn disabled(self) -> &'a mut W {
654 self.variant(DMA_A::Disabled)
655 }
656 #[doc = "DMA mode enabled"]
657 #[inline(always)]
658 pub fn enabled(self) -> &'a mut W {
659 self.variant(DMA_A::Enabled)
660 }
661}
662#[doc = "Reset calibration\n\nValue on reset: 0"]
663#[derive(Clone, Copy, Debug, PartialEq)]
664pub enum RSTCAL_A {
665 #[doc = "0: Calibration register initialized"]
666 Initialized = 0,
667 #[doc = "1: Initializing calibration register"]
668 NotInitialized = 1,
669}
670impl From<RSTCAL_A> for bool {
671 #[inline(always)]
672 fn from(variant: RSTCAL_A) -> Self {
673 variant as u8 != 0
674 }
675}
676#[doc = "Field `RSTCAL` reader - Reset calibration"]
677pub type RSTCAL_R = crate::BitReader<RSTCAL_A>;
678impl RSTCAL_R {
679 #[doc = "Get enumerated values variant"]
680 #[inline(always)]
681 pub fn variant(&self) -> RSTCAL_A {
682 match self.bits {
683 false => RSTCAL_A::Initialized,
684 true => RSTCAL_A::NotInitialized,
685 }
686 }
687 #[doc = "Checks if the value of the field is `Initialized`"]
688 #[inline(always)]
689 pub fn is_initialized(&self) -> bool {
690 *self == RSTCAL_A::Initialized
691 }
692 #[doc = "Checks if the value of the field is `NotInitialized`"]
693 #[inline(always)]
694 pub fn is_not_initialized(&self) -> bool {
695 *self == RSTCAL_A::NotInitialized
696 }
697}
698#[doc = "Reset calibration\n\nValue on reset: 0"]
699#[derive(Clone, Copy, Debug, PartialEq)]
700pub enum RSTCAL_AW {
701 #[doc = "1: Initialize calibration register"]
702 Initialize = 1,
703}
704impl From<RSTCAL_AW> for bool {
705 #[inline(always)]
706 fn from(variant: RSTCAL_AW) -> Self {
707 variant as u8 != 0
708 }
709}
710#[doc = "Field `RSTCAL` writer - Reset calibration"]
711pub type RSTCAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, RSTCAL_AW, O>;
712impl<'a, const O: u8> RSTCAL_W<'a, O> {
713 #[doc = "Initialize calibration register"]
714 #[inline(always)]
715 pub fn initialize(self) -> &'a mut W {
716 self.variant(RSTCAL_AW::Initialize)
717 }
718}
719#[doc = "A/D calibration\n\nValue on reset: 0"]
720#[derive(Clone, Copy, Debug, PartialEq)]
721pub enum CAL_A {
722 #[doc = "0: Calibration completed"]
723 Complete = 0,
724 #[doc = "1: Calibrating"]
725 NotComplete = 1,
726}
727impl From<CAL_A> for bool {
728 #[inline(always)]
729 fn from(variant: CAL_A) -> Self {
730 variant as u8 != 0
731 }
732}
733#[doc = "Field `CAL` reader - A/D calibration"]
734pub type CAL_R = crate::BitReader<CAL_A>;
735impl CAL_R {
736 #[doc = "Get enumerated values variant"]
737 #[inline(always)]
738 pub fn variant(&self) -> CAL_A {
739 match self.bits {
740 false => CAL_A::Complete,
741 true => CAL_A::NotComplete,
742 }
743 }
744 #[doc = "Checks if the value of the field is `Complete`"]
745 #[inline(always)]
746 pub fn is_complete(&self) -> bool {
747 *self == CAL_A::Complete
748 }
749 #[doc = "Checks if the value of the field is `NotComplete`"]
750 #[inline(always)]
751 pub fn is_not_complete(&self) -> bool {
752 *self == CAL_A::NotComplete
753 }
754}
755#[doc = "A/D calibration\n\nValue on reset: 0"]
756#[derive(Clone, Copy, Debug, PartialEq)]
757pub enum CAL_AW {
758 #[doc = "1: Enable calibration"]
759 Start = 1,
760}
761impl From<CAL_AW> for bool {
762 #[inline(always)]
763 fn from(variant: CAL_AW) -> Self {
764 variant as u8 != 0
765 }
766}
767#[doc = "Field `CAL` writer - A/D calibration"]
768pub type CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, CAL_AW, O>;
769impl<'a, const O: u8> CAL_W<'a, O> {
770 #[doc = "Enable calibration"]
771 #[inline(always)]
772 pub fn start(self) -> &'a mut W {
773 self.variant(CAL_AW::Start)
774 }
775}
776#[doc = "Continuous conversion\n\nValue on reset: 0"]
777#[derive(Clone, Copy, Debug, PartialEq)]
778pub enum CONT_A {
779 #[doc = "0: Single conversion mode"]
780 Single = 0,
781 #[doc = "1: Continuous conversion mode"]
782 Continuous = 1,
783}
784impl From<CONT_A> for bool {
785 #[inline(always)]
786 fn from(variant: CONT_A) -> Self {
787 variant as u8 != 0
788 }
789}
790#[doc = "Field `CONT` reader - Continuous conversion"]
791pub type CONT_R = crate::BitReader<CONT_A>;
792impl CONT_R {
793 #[doc = "Get enumerated values variant"]
794 #[inline(always)]
795 pub fn variant(&self) -> CONT_A {
796 match self.bits {
797 false => CONT_A::Single,
798 true => CONT_A::Continuous,
799 }
800 }
801 #[doc = "Checks if the value of the field is `Single`"]
802 #[inline(always)]
803 pub fn is_single(&self) -> bool {
804 *self == CONT_A::Single
805 }
806 #[doc = "Checks if the value of the field is `Continuous`"]
807 #[inline(always)]
808 pub fn is_continuous(&self) -> bool {
809 *self == CONT_A::Continuous
810 }
811}
812#[doc = "Field `CONT` writer - Continuous conversion"]
813pub type CONT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, CONT_A, O>;
814impl<'a, const O: u8> CONT_W<'a, O> {
815 #[doc = "Single conversion mode"]
816 #[inline(always)]
817 pub fn single(self) -> &'a mut W {
818 self.variant(CONT_A::Single)
819 }
820 #[doc = "Continuous conversion mode"]
821 #[inline(always)]
822 pub fn continuous(self) -> &'a mut W {
823 self.variant(CONT_A::Continuous)
824 }
825}
826#[doc = "A/D converter ON / OFF\n\nValue on reset: 0"]
827#[derive(Clone, Copy, Debug, PartialEq)]
828pub enum ADON_A {
829 #[doc = "0: Disable ADC conversion/calibration and go to power down mode"]
830 Disabled = 0,
831 #[doc = "1: Enable ADC and to start conversion"]
832 Enabled = 1,
833}
834impl From<ADON_A> for bool {
835 #[inline(always)]
836 fn from(variant: ADON_A) -> Self {
837 variant as u8 != 0
838 }
839}
840#[doc = "Field `ADON` reader - A/D converter ON / OFF"]
841pub type ADON_R = crate::BitReader<ADON_A>;
842impl ADON_R {
843 #[doc = "Get enumerated values variant"]
844 #[inline(always)]
845 pub fn variant(&self) -> ADON_A {
846 match self.bits {
847 false => ADON_A::Disabled,
848 true => ADON_A::Enabled,
849 }
850 }
851 #[doc = "Checks if the value of the field is `Disabled`"]
852 #[inline(always)]
853 pub fn is_disabled(&self) -> bool {
854 *self == ADON_A::Disabled
855 }
856 #[doc = "Checks if the value of the field is `Enabled`"]
857 #[inline(always)]
858 pub fn is_enabled(&self) -> bool {
859 *self == ADON_A::Enabled
860 }
861}
862#[doc = "Field `ADON` writer - A/D converter ON / OFF"]
863pub type ADON_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR2_SPEC, ADON_A, O>;
864impl<'a, const O: u8> ADON_W<'a, O> {
865 #[doc = "Disable ADC conversion/calibration and go to power down mode"]
866 #[inline(always)]
867 pub fn disabled(self) -> &'a mut W {
868 self.variant(ADON_A::Disabled)
869 }
870 #[doc = "Enable ADC and to start conversion"]
871 #[inline(always)]
872 pub fn enabled(self) -> &'a mut W {
873 self.variant(ADON_A::Enabled)
874 }
875}
876impl R {
877 #[doc = "Bit 23 - Temperature sensor and VREFINT enable"]
878 #[inline(always)]
879 pub fn tsvrefe(&self) -> TSVREFE_R {
880 TSVREFE_R::new(((self.bits >> 23) & 1) != 0)
881 }
882 #[doc = "Bit 22 - Start conversion of regular channels"]
883 #[inline(always)]
884 pub fn swstart(&self) -> SWSTART_R {
885 SWSTART_R::new(((self.bits >> 22) & 1) != 0)
886 }
887 #[doc = "Bit 21 - Start conversion of injected channels"]
888 #[inline(always)]
889 pub fn jswstart(&self) -> JSWSTART_R {
890 JSWSTART_R::new(((self.bits >> 21) & 1) != 0)
891 }
892 #[doc = "Bit 20 - External trigger conversion mode for regular channels"]
893 #[inline(always)]
894 pub fn exttrig(&self) -> EXTTRIG_R {
895 EXTTRIG_R::new(((self.bits >> 20) & 1) != 0)
896 }
897 #[doc = "Bits 17:19 - External event select for regular group"]
898 #[inline(always)]
899 pub fn extsel(&self) -> EXTSEL_R {
900 EXTSEL_R::new(((self.bits >> 17) & 7) as u8)
901 }
902 #[doc = "Bit 15 - External trigger conversion mode for injected channels"]
903 #[inline(always)]
904 pub fn jexttrig(&self) -> JEXTTRIG_R {
905 JEXTTRIG_R::new(((self.bits >> 15) & 1) != 0)
906 }
907 #[doc = "Bits 12:14 - External event select for injected group"]
908 #[inline(always)]
909 pub fn jextsel(&self) -> JEXTSEL_R {
910 JEXTSEL_R::new(((self.bits >> 12) & 7) as u8)
911 }
912 #[doc = "Bit 11 - Data alignment"]
913 #[inline(always)]
914 pub fn align(&self) -> ALIGN_R {
915 ALIGN_R::new(((self.bits >> 11) & 1) != 0)
916 }
917 #[doc = "Bit 8 - Direct memory access mode"]
918 #[inline(always)]
919 pub fn dma(&self) -> DMA_R {
920 DMA_R::new(((self.bits >> 8) & 1) != 0)
921 }
922 #[doc = "Bit 3 - Reset calibration"]
923 #[inline(always)]
924 pub fn rstcal(&self) -> RSTCAL_R {
925 RSTCAL_R::new(((self.bits >> 3) & 1) != 0)
926 }
927 #[doc = "Bit 2 - A/D calibration"]
928 #[inline(always)]
929 pub fn cal(&self) -> CAL_R {
930 CAL_R::new(((self.bits >> 2) & 1) != 0)
931 }
932 #[doc = "Bit 1 - Continuous conversion"]
933 #[inline(always)]
934 pub fn cont(&self) -> CONT_R {
935 CONT_R::new(((self.bits >> 1) & 1) != 0)
936 }
937 #[doc = "Bit 0 - A/D converter ON / OFF"]
938 #[inline(always)]
939 pub fn adon(&self) -> ADON_R {
940 ADON_R::new((self.bits & 1) != 0)
941 }
942}
943impl W {
944 #[doc = "Bit 23 - Temperature sensor and VREFINT enable"]
945 #[inline(always)]
946 pub fn tsvrefe(&mut self) -> TSVREFE_W<23> {
947 TSVREFE_W::new(self)
948 }
949 #[doc = "Bit 22 - Start conversion of regular channels"]
950 #[inline(always)]
951 pub fn swstart(&mut self) -> SWSTART_W<22> {
952 SWSTART_W::new(self)
953 }
954 #[doc = "Bit 21 - Start conversion of injected channels"]
955 #[inline(always)]
956 pub fn jswstart(&mut self) -> JSWSTART_W<21> {
957 JSWSTART_W::new(self)
958 }
959 #[doc = "Bit 20 - External trigger conversion mode for regular channels"]
960 #[inline(always)]
961 pub fn exttrig(&mut self) -> EXTTRIG_W<20> {
962 EXTTRIG_W::new(self)
963 }
964 #[doc = "Bits 17:19 - External event select for regular group"]
965 #[inline(always)]
966 pub fn extsel(&mut self) -> EXTSEL_W<17> {
967 EXTSEL_W::new(self)
968 }
969 #[doc = "Bit 15 - External trigger conversion mode for injected channels"]
970 #[inline(always)]
971 pub fn jexttrig(&mut self) -> JEXTTRIG_W<15> {
972 JEXTTRIG_W::new(self)
973 }
974 #[doc = "Bits 12:14 - External event select for injected group"]
975 #[inline(always)]
976 pub fn jextsel(&mut self) -> JEXTSEL_W<12> {
977 JEXTSEL_W::new(self)
978 }
979 #[doc = "Bit 11 - Data alignment"]
980 #[inline(always)]
981 pub fn align(&mut self) -> ALIGN_W<11> {
982 ALIGN_W::new(self)
983 }
984 #[doc = "Bit 8 - Direct memory access mode"]
985 #[inline(always)]
986 pub fn dma(&mut self) -> DMA_W<8> {
987 DMA_W::new(self)
988 }
989 #[doc = "Bit 3 - Reset calibration"]
990 #[inline(always)]
991 pub fn rstcal(&mut self) -> RSTCAL_W<3> {
992 RSTCAL_W::new(self)
993 }
994 #[doc = "Bit 2 - A/D calibration"]
995 #[inline(always)]
996 pub fn cal(&mut self) -> CAL_W<2> {
997 CAL_W::new(self)
998 }
999 #[doc = "Bit 1 - Continuous conversion"]
1000 #[inline(always)]
1001 pub fn cont(&mut self) -> CONT_W<1> {
1002 CONT_W::new(self)
1003 }
1004 #[doc = "Bit 0 - A/D converter ON / OFF"]
1005 #[inline(always)]
1006 pub fn adon(&mut self) -> ADON_W<0> {
1007 ADON_W::new(self)
1008 }
1009 #[doc = "Writes raw bits to the register."]
1010 #[inline(always)]
1011 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1012 self.0.bits(bits);
1013 self
1014 }
1015}
1016#[doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](index.html) module"]
1017pub struct CR2_SPEC;
1018impl crate::RegisterSpec for CR2_SPEC {
1019 type Ux = u32;
1020}
1021#[doc = "`read()` method returns [cr2::R](R) reader structure"]
1022impl crate::Readable for CR2_SPEC {
1023 type Reader = R;
1024}
1025#[doc = "`write(|w| ..)` method takes [cr2::W](W) writer structure"]
1026impl crate::Writable for CR2_SPEC {
1027 type Writer = W;
1028}
1029#[doc = "`reset()` method sets CR2 to value 0"]
1030impl crate::Resettable for CR2_SPEC {
1031 #[inline(always)]
1032 fn reset_value() -> Self::Ux {
1033 0
1034 }
1035}