stm32f1/stm32f101/tim6/
dier.rs1#[doc = "Register `DIER` reader"]
2pub struct R(crate::R<DIER_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DIER_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DIER_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DIER_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DIER` writer"]
17pub struct W(crate::W<DIER_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DIER_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DIER_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DIER_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Update DMA request enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum UDE_A {
40 #[doc = "0: Update DMA request disabled"]
41 Disabled = 0,
42 #[doc = "1: Update DMA request enabled"]
43 Enabled = 1,
44}
45impl From<UDE_A> for bool {
46 #[inline(always)]
47 fn from(variant: UDE_A) -> Self {
48 variant as u8 != 0
49 }
50}
51#[doc = "Field `UDE` reader - Update DMA request enable"]
52pub type UDE_R = crate::BitReader<UDE_A>;
53impl UDE_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> UDE_A {
57 match self.bits {
58 false => UDE_A::Disabled,
59 true => UDE_A::Enabled,
60 }
61 }
62 #[doc = "Checks if the value of the field is `Disabled`"]
63 #[inline(always)]
64 pub fn is_disabled(&self) -> bool {
65 *self == UDE_A::Disabled
66 }
67 #[doc = "Checks if the value of the field is `Enabled`"]
68 #[inline(always)]
69 pub fn is_enabled(&self) -> bool {
70 *self == UDE_A::Enabled
71 }
72}
73#[doc = "Field `UDE` writer - Update DMA request enable"]
74pub type UDE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, UDE_A, O>;
75impl<'a, const O: u8> UDE_W<'a, O> {
76 #[doc = "Update DMA request disabled"]
77 #[inline(always)]
78 pub fn disabled(self) -> &'a mut W {
79 self.variant(UDE_A::Disabled)
80 }
81 #[doc = "Update DMA request enabled"]
82 #[inline(always)]
83 pub fn enabled(self) -> &'a mut W {
84 self.variant(UDE_A::Enabled)
85 }
86}
87#[doc = "Update interrupt enable\n\nValue on reset: 0"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum UIE_A {
90 #[doc = "0: Update interrupt disabled"]
91 Disabled = 0,
92 #[doc = "1: Update interrupt enabled"]
93 Enabled = 1,
94}
95impl From<UIE_A> for bool {
96 #[inline(always)]
97 fn from(variant: UIE_A) -> Self {
98 variant as u8 != 0
99 }
100}
101#[doc = "Field `UIE` reader - Update interrupt enable"]
102pub type UIE_R = crate::BitReader<UIE_A>;
103impl UIE_R {
104 #[doc = "Get enumerated values variant"]
105 #[inline(always)]
106 pub fn variant(&self) -> UIE_A {
107 match self.bits {
108 false => UIE_A::Disabled,
109 true => UIE_A::Enabled,
110 }
111 }
112 #[doc = "Checks if the value of the field is `Disabled`"]
113 #[inline(always)]
114 pub fn is_disabled(&self) -> bool {
115 *self == UIE_A::Disabled
116 }
117 #[doc = "Checks if the value of the field is `Enabled`"]
118 #[inline(always)]
119 pub fn is_enabled(&self) -> bool {
120 *self == UIE_A::Enabled
121 }
122}
123#[doc = "Field `UIE` writer - Update interrupt enable"]
124pub type UIE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIER_SPEC, UIE_A, O>;
125impl<'a, const O: u8> UIE_W<'a, O> {
126 #[doc = "Update interrupt disabled"]
127 #[inline(always)]
128 pub fn disabled(self) -> &'a mut W {
129 self.variant(UIE_A::Disabled)
130 }
131 #[doc = "Update interrupt enabled"]
132 #[inline(always)]
133 pub fn enabled(self) -> &'a mut W {
134 self.variant(UIE_A::Enabled)
135 }
136}
137impl R {
138 #[doc = "Bit 8 - Update DMA request enable"]
139 #[inline(always)]
140 pub fn ude(&self) -> UDE_R {
141 UDE_R::new(((self.bits >> 8) & 1) != 0)
142 }
143 #[doc = "Bit 0 - Update interrupt enable"]
144 #[inline(always)]
145 pub fn uie(&self) -> UIE_R {
146 UIE_R::new((self.bits & 1) != 0)
147 }
148}
149impl W {
150 #[doc = "Bit 8 - Update DMA request enable"]
151 #[inline(always)]
152 pub fn ude(&mut self) -> UDE_W<8> {
153 UDE_W::new(self)
154 }
155 #[doc = "Bit 0 - Update interrupt enable"]
156 #[inline(always)]
157 pub fn uie(&mut self) -> UIE_W<0> {
158 UIE_W::new(self)
159 }
160 #[doc = "Writes raw bits to the register."]
161 #[inline(always)]
162 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
163 self.0.bits(bits);
164 self
165 }
166}
167#[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](index.html) module"]
168pub struct DIER_SPEC;
169impl crate::RegisterSpec for DIER_SPEC {
170 type Ux = u32;
171}
172#[doc = "`read()` method returns [dier::R](R) reader structure"]
173impl crate::Readable for DIER_SPEC {
174 type Reader = R;
175}
176#[doc = "`write(|w| ..)` method takes [dier::W](W) writer structure"]
177impl crate::Writable for DIER_SPEC {
178 type Writer = W;
179}
180#[doc = "`reset()` method sets DIER to value 0"]
181impl crate::Resettable for DIER_SPEC {
182 #[inline(always)]
183 fn reset_value() -> Self::Ux {
184 0
185 }
186}