stm32f1/stm32f100/tim13/
egr.rs

1#[doc = "Register `EGR` writer"]
2pub struct W(crate::W<EGR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<EGR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<EGR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<EGR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CC1G` writer - Capture/compare 1 generation"]
23pub type CC1G_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, bool, O>;
24#[doc = "Update generation\n\nValue on reset: 0"]
25#[derive(Clone, Copy, Debug, PartialEq)]
26pub enum UG_AW {
27    #[doc = "1: Re-initializes the timer counter and generates an update of the registers."]
28    Update = 1,
29}
30impl From<UG_AW> for bool {
31    #[inline(always)]
32    fn from(variant: UG_AW) -> Self {
33        variant as u8 != 0
34    }
35}
36#[doc = "Field `UG` writer - Update generation"]
37pub type UG_W<'a, const O: u8> = crate::BitWriter<'a, u32, EGR_SPEC, UG_AW, O>;
38impl<'a, const O: u8> UG_W<'a, O> {
39    #[doc = "Re-initializes the timer counter and generates an update of the registers."]
40    #[inline(always)]
41    pub fn update(self) -> &'a mut W {
42        self.variant(UG_AW::Update)
43    }
44}
45impl W {
46    #[doc = "Bit 1 - Capture/compare 1 generation"]
47    #[inline(always)]
48    pub fn cc1g(&mut self) -> CC1G_W<1> {
49        CC1G_W::new(self)
50    }
51    #[doc = "Bit 0 - Update generation"]
52    #[inline(always)]
53    pub fn ug(&mut self) -> UG_W<0> {
54        UG_W::new(self)
55    }
56    #[doc = "Writes raw bits to the register."]
57    #[inline(always)]
58    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
59        self.0.bits(bits);
60        self
61    }
62}
63#[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](index.html) module"]
64pub struct EGR_SPEC;
65impl crate::RegisterSpec for EGR_SPEC {
66    type Ux = u32;
67}
68#[doc = "`write(|w| ..)` method takes [egr::W](W) writer structure"]
69impl crate::Writable for EGR_SPEC {
70    type Writer = W;
71}
72#[doc = "`reset()` method sets EGR to value 0"]
73impl crate::Resettable for EGR_SPEC {
74    #[inline(always)]
75    fn reset_value() -> Self::Ux {
76        0
77    }
78}
stm32f1/stm32f100/tim13/egr.rs

stm32f1/stm32f100/tim13/
egr.rs
