stm32f1/stm32f100/tim1/
cr1.rs

1#[doc = "Register `CR1` reader"]
2pub struct R(crate::R<CR1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CR1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CR1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CR1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CR1` writer"]
17pub struct W(crate::W<CR1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CR1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CR1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CR1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Clock division\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum CKD_A {
41    #[doc = "0: t_DTS = t_CK_INT"]
42    Div1 = 0,
43    #[doc = "1: t_DTS = 2 × t_CK_INT"]
44    Div2 = 1,
45    #[doc = "2: t_DTS = 4 × t_CK_INT"]
46    Div4 = 2,
47}
48impl From<CKD_A> for u8 {
49    #[inline(always)]
50    fn from(variant: CKD_A) -> Self {
51        variant as _
52    }
53}
54#[doc = "Field `CKD` reader - Clock division"]
55pub type CKD_R = crate::FieldReader<u8, CKD_A>;
56impl CKD_R {
57    #[doc = "Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> Option<CKD_A> {
60        match self.bits {
61            0 => Some(CKD_A::Div1),
62            1 => Some(CKD_A::Div2),
63            2 => Some(CKD_A::Div4),
64            _ => None,
65        }
66    }
67    #[doc = "Checks if the value of the field is `Div1`"]
68    #[inline(always)]
69    pub fn is_div1(&self) -> bool {
70        *self == CKD_A::Div1
71    }
72    #[doc = "Checks if the value of the field is `Div2`"]
73    #[inline(always)]
74    pub fn is_div2(&self) -> bool {
75        *self == CKD_A::Div2
76    }
77    #[doc = "Checks if the value of the field is `Div4`"]
78    #[inline(always)]
79    pub fn is_div4(&self) -> bool {
80        *self == CKD_A::Div4
81    }
82}
83#[doc = "Field `CKD` writer - Clock division"]
84pub type CKD_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CR1_SPEC, u8, CKD_A, 2, O>;
85impl<'a, const O: u8> CKD_W<'a, O> {
86    #[doc = "t_DTS = t_CK_INT"]
87    #[inline(always)]
88    pub fn div1(self) -> &'a mut W {
89        self.variant(CKD_A::Div1)
90    }
91    #[doc = "t_DTS = 2 × t_CK_INT"]
92    #[inline(always)]
93    pub fn div2(self) -> &'a mut W {
94        self.variant(CKD_A::Div2)
95    }
96    #[doc = "t_DTS = 4 × t_CK_INT"]
97    #[inline(always)]
98    pub fn div4(self) -> &'a mut W {
99        self.variant(CKD_A::Div4)
100    }
101}
102#[doc = "Auto-reload preload enable\n\nValue on reset: 0"]
103#[derive(Clone, Copy, Debug, PartialEq)]
104pub enum ARPE_A {
105    #[doc = "0: TIMx_APRR register is not buffered"]
106    Disabled = 0,
107    #[doc = "1: TIMx_APRR register is buffered"]
108    Enabled = 1,
109}
110impl From<ARPE_A> for bool {
111    #[inline(always)]
112    fn from(variant: ARPE_A) -> Self {
113        variant as u8 != 0
114    }
115}
116#[doc = "Field `ARPE` reader - Auto-reload preload enable"]
117pub type ARPE_R = crate::BitReader<ARPE_A>;
118impl ARPE_R {
119    #[doc = "Get enumerated values variant"]
120    #[inline(always)]
121    pub fn variant(&self) -> ARPE_A {
122        match self.bits {
123            false => ARPE_A::Disabled,
124            true => ARPE_A::Enabled,
125        }
126    }
127    #[doc = "Checks if the value of the field is `Disabled`"]
128    #[inline(always)]
129    pub fn is_disabled(&self) -> bool {
130        *self == ARPE_A::Disabled
131    }
132    #[doc = "Checks if the value of the field is `Enabled`"]
133    #[inline(always)]
134    pub fn is_enabled(&self) -> bool {
135        *self == ARPE_A::Enabled
136    }
137}
138#[doc = "Field `ARPE` writer - Auto-reload preload enable"]
139pub type ARPE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, ARPE_A, O>;
140impl<'a, const O: u8> ARPE_W<'a, O> {
141    #[doc = "TIMx_APRR register is not buffered"]
142    #[inline(always)]
143    pub fn disabled(self) -> &'a mut W {
144        self.variant(ARPE_A::Disabled)
145    }
146    #[doc = "TIMx_APRR register is buffered"]
147    #[inline(always)]
148    pub fn enabled(self) -> &'a mut W {
149        self.variant(ARPE_A::Enabled)
150    }
151}
152#[doc = "Center-aligned mode selection\n\nValue on reset: 0"]
153#[derive(Clone, Copy, Debug, PartialEq)]
154#[repr(u8)]
155pub enum CMS_A {
156    #[doc = "0: The counter counts up or down depending on the direction bit"]
157    EdgeAligned = 0,
158    #[doc = "1: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."]
159    CenterAligned1 = 1,
160    #[doc = "2: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."]
161    CenterAligned2 = 2,
162    #[doc = "3: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."]
163    CenterAligned3 = 3,
164}
165impl From<CMS_A> for u8 {
166    #[inline(always)]
167    fn from(variant: CMS_A) -> Self {
168        variant as _
169    }
170}
171#[doc = "Field `CMS` reader - Center-aligned mode selection"]
172pub type CMS_R = crate::FieldReader<u8, CMS_A>;
173impl CMS_R {
174    #[doc = "Get enumerated values variant"]
175    #[inline(always)]
176    pub fn variant(&self) -> CMS_A {
177        match self.bits {
178            0 => CMS_A::EdgeAligned,
179            1 => CMS_A::CenterAligned1,
180            2 => CMS_A::CenterAligned2,
181            3 => CMS_A::CenterAligned3,
182            _ => unreachable!(),
183        }
184    }
185    #[doc = "Checks if the value of the field is `EdgeAligned`"]
186    #[inline(always)]
187    pub fn is_edge_aligned(&self) -> bool {
188        *self == CMS_A::EdgeAligned
189    }
190    #[doc = "Checks if the value of the field is `CenterAligned1`"]
191    #[inline(always)]
192    pub fn is_center_aligned1(&self) -> bool {
193        *self == CMS_A::CenterAligned1
194    }
195    #[doc = "Checks if the value of the field is `CenterAligned2`"]
196    #[inline(always)]
197    pub fn is_center_aligned2(&self) -> bool {
198        *self == CMS_A::CenterAligned2
199    }
200    #[doc = "Checks if the value of the field is `CenterAligned3`"]
201    #[inline(always)]
202    pub fn is_center_aligned3(&self) -> bool {
203        *self == CMS_A::CenterAligned3
204    }
205}
206#[doc = "Field `CMS` writer - Center-aligned mode selection"]
207pub type CMS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CR1_SPEC, u8, CMS_A, 2, O>;
208impl<'a, const O: u8> CMS_W<'a, O> {
209    #[doc = "The counter counts up or down depending on the direction bit"]
210    #[inline(always)]
211    pub fn edge_aligned(self) -> &'a mut W {
212        self.variant(CMS_A::EdgeAligned)
213    }
214    #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down."]
215    #[inline(always)]
216    pub fn center_aligned1(self) -> &'a mut W {
217        self.variant(CMS_A::CenterAligned1)
218    }
219    #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up."]
220    #[inline(always)]
221    pub fn center_aligned2(self) -> &'a mut W {
222        self.variant(CMS_A::CenterAligned2)
223    }
224    #[doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down."]
225    #[inline(always)]
226    pub fn center_aligned3(self) -> &'a mut W {
227        self.variant(CMS_A::CenterAligned3)
228    }
229}
230#[doc = "Direction\n\nValue on reset: 0"]
231#[derive(Clone, Copy, Debug, PartialEq)]
232pub enum DIR_A {
233    #[doc = "0: Counter used as upcounter"]
234    Up = 0,
235    #[doc = "1: Counter used as downcounter"]
236    Down = 1,
237}
238impl From<DIR_A> for bool {
239    #[inline(always)]
240    fn from(variant: DIR_A) -> Self {
241        variant as u8 != 0
242    }
243}
244#[doc = "Field `DIR` reader - Direction"]
245pub type DIR_R = crate::BitReader<DIR_A>;
246impl DIR_R {
247    #[doc = "Get enumerated values variant"]
248    #[inline(always)]
249    pub fn variant(&self) -> DIR_A {
250        match self.bits {
251            false => DIR_A::Up,
252            true => DIR_A::Down,
253        }
254    }
255    #[doc = "Checks if the value of the field is `Up`"]
256    #[inline(always)]
257    pub fn is_up(&self) -> bool {
258        *self == DIR_A::Up
259    }
260    #[doc = "Checks if the value of the field is `Down`"]
261    #[inline(always)]
262    pub fn is_down(&self) -> bool {
263        *self == DIR_A::Down
264    }
265}
266#[doc = "Field `DIR` writer - Direction"]
267pub type DIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, DIR_A, O>;
268impl<'a, const O: u8> DIR_W<'a, O> {
269    #[doc = "Counter used as upcounter"]
270    #[inline(always)]
271    pub fn up(self) -> &'a mut W {
272        self.variant(DIR_A::Up)
273    }
274    #[doc = "Counter used as downcounter"]
275    #[inline(always)]
276    pub fn down(self) -> &'a mut W {
277        self.variant(DIR_A::Down)
278    }
279}
280#[doc = "One-pulse mode\n\nValue on reset: 0"]
281#[derive(Clone, Copy, Debug, PartialEq)]
282pub enum OPM_A {
283    #[doc = "0: Counter is not stopped at update event"]
284    Disabled = 0,
285    #[doc = "1: Counter stops counting at the next update event (clearing the CEN bit)"]
286    Enabled = 1,
287}
288impl From<OPM_A> for bool {
289    #[inline(always)]
290    fn from(variant: OPM_A) -> Self {
291        variant as u8 != 0
292    }
293}
294#[doc = "Field `OPM` reader - One-pulse mode"]
295pub type OPM_R = crate::BitReader<OPM_A>;
296impl OPM_R {
297    #[doc = "Get enumerated values variant"]
298    #[inline(always)]
299    pub fn variant(&self) -> OPM_A {
300        match self.bits {
301            false => OPM_A::Disabled,
302            true => OPM_A::Enabled,
303        }
304    }
305    #[doc = "Checks if the value of the field is `Disabled`"]
306    #[inline(always)]
307    pub fn is_disabled(&self) -> bool {
308        *self == OPM_A::Disabled
309    }
310    #[doc = "Checks if the value of the field is `Enabled`"]
311    #[inline(always)]
312    pub fn is_enabled(&self) -> bool {
313        *self == OPM_A::Enabled
314    }
315}
316#[doc = "Field `OPM` writer - One-pulse mode"]
317pub type OPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, OPM_A, O>;
318impl<'a, const O: u8> OPM_W<'a, O> {
319    #[doc = "Counter is not stopped at update event"]
320    #[inline(always)]
321    pub fn disabled(self) -> &'a mut W {
322        self.variant(OPM_A::Disabled)
323    }
324    #[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
325    #[inline(always)]
326    pub fn enabled(self) -> &'a mut W {
327        self.variant(OPM_A::Enabled)
328    }
329}
330#[doc = "Update request source\n\nValue on reset: 0"]
331#[derive(Clone, Copy, Debug, PartialEq)]
332pub enum URS_A {
333    #[doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"]
334    AnyEvent = 0,
335    #[doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request"]
336    CounterOnly = 1,
337}
338impl From<URS_A> for bool {
339    #[inline(always)]
340    fn from(variant: URS_A) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `URS` reader - Update request source"]
345pub type URS_R = crate::BitReader<URS_A>;
346impl URS_R {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub fn variant(&self) -> URS_A {
350        match self.bits {
351            false => URS_A::AnyEvent,
352            true => URS_A::CounterOnly,
353        }
354    }
355    #[doc = "Checks if the value of the field is `AnyEvent`"]
356    #[inline(always)]
357    pub fn is_any_event(&self) -> bool {
358        *self == URS_A::AnyEvent
359    }
360    #[doc = "Checks if the value of the field is `CounterOnly`"]
361    #[inline(always)]
362    pub fn is_counter_only(&self) -> bool {
363        *self == URS_A::CounterOnly
364    }
365}
366#[doc = "Field `URS` writer - Update request source"]
367pub type URS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, URS_A, O>;
368impl<'a, const O: u8> URS_W<'a, O> {
369    #[doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request"]
370    #[inline(always)]
371    pub fn any_event(self) -> &'a mut W {
372        self.variant(URS_A::AnyEvent)
373    }
374    #[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"]
375    #[inline(always)]
376    pub fn counter_only(self) -> &'a mut W {
377        self.variant(URS_A::CounterOnly)
378    }
379}
380#[doc = "Update disable\n\nValue on reset: 0"]
381#[derive(Clone, Copy, Debug, PartialEq)]
382pub enum UDIS_A {
383    #[doc = "0: Update event enabled"]
384    Enabled = 0,
385    #[doc = "1: Update event disabled"]
386    Disabled = 1,
387}
388impl From<UDIS_A> for bool {
389    #[inline(always)]
390    fn from(variant: UDIS_A) -> Self {
391        variant as u8 != 0
392    }
393}
394#[doc = "Field `UDIS` reader - Update disable"]
395pub type UDIS_R = crate::BitReader<UDIS_A>;
396impl UDIS_R {
397    #[doc = "Get enumerated values variant"]
398    #[inline(always)]
399    pub fn variant(&self) -> UDIS_A {
400        match self.bits {
401            false => UDIS_A::Enabled,
402            true => UDIS_A::Disabled,
403        }
404    }
405    #[doc = "Checks if the value of the field is `Enabled`"]
406    #[inline(always)]
407    pub fn is_enabled(&self) -> bool {
408        *self == UDIS_A::Enabled
409    }
410    #[doc = "Checks if the value of the field is `Disabled`"]
411    #[inline(always)]
412    pub fn is_disabled(&self) -> bool {
413        *self == UDIS_A::Disabled
414    }
415}
416#[doc = "Field `UDIS` writer - Update disable"]
417pub type UDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, UDIS_A, O>;
418impl<'a, const O: u8> UDIS_W<'a, O> {
419    #[doc = "Update event enabled"]
420    #[inline(always)]
421    pub fn enabled(self) -> &'a mut W {
422        self.variant(UDIS_A::Enabled)
423    }
424    #[doc = "Update event disabled"]
425    #[inline(always)]
426    pub fn disabled(self) -> &'a mut W {
427        self.variant(UDIS_A::Disabled)
428    }
429}
430#[doc = "Counter enable\n\nValue on reset: 0"]
431#[derive(Clone, Copy, Debug, PartialEq)]
432pub enum CEN_A {
433    #[doc = "0: Counter disabled"]
434    Disabled = 0,
435    #[doc = "1: Counter enabled"]
436    Enabled = 1,
437}
438impl From<CEN_A> for bool {
439    #[inline(always)]
440    fn from(variant: CEN_A) -> Self {
441        variant as u8 != 0
442    }
443}
444#[doc = "Field `CEN` reader - Counter enable"]
445pub type CEN_R = crate::BitReader<CEN_A>;
446impl CEN_R {
447    #[doc = "Get enumerated values variant"]
448    #[inline(always)]
449    pub fn variant(&self) -> CEN_A {
450        match self.bits {
451            false => CEN_A::Disabled,
452            true => CEN_A::Enabled,
453        }
454    }
455    #[doc = "Checks if the value of the field is `Disabled`"]
456    #[inline(always)]
457    pub fn is_disabled(&self) -> bool {
458        *self == CEN_A::Disabled
459    }
460    #[doc = "Checks if the value of the field is `Enabled`"]
461    #[inline(always)]
462    pub fn is_enabled(&self) -> bool {
463        *self == CEN_A::Enabled
464    }
465}
466#[doc = "Field `CEN` writer - Counter enable"]
467pub type CEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR1_SPEC, CEN_A, O>;
468impl<'a, const O: u8> CEN_W<'a, O> {
469    #[doc = "Counter disabled"]
470    #[inline(always)]
471    pub fn disabled(self) -> &'a mut W {
472        self.variant(CEN_A::Disabled)
473    }
474    #[doc = "Counter enabled"]
475    #[inline(always)]
476    pub fn enabled(self) -> &'a mut W {
477        self.variant(CEN_A::Enabled)
478    }
479}
480impl R {
481    #[doc = "Bits 8:9 - Clock division"]
482    #[inline(always)]
483    pub fn ckd(&self) -> CKD_R {
484        CKD_R::new(((self.bits >> 8) & 3) as u8)
485    }
486    #[doc = "Bit 7 - Auto-reload preload enable"]
487    #[inline(always)]
488    pub fn arpe(&self) -> ARPE_R {
489        ARPE_R::new(((self.bits >> 7) & 1) != 0)
490    }
491    #[doc = "Bits 5:6 - Center-aligned mode selection"]
492    #[inline(always)]
493    pub fn cms(&self) -> CMS_R {
494        CMS_R::new(((self.bits >> 5) & 3) as u8)
495    }
496    #[doc = "Bit 4 - Direction"]
497    #[inline(always)]
498    pub fn dir(&self) -> DIR_R {
499        DIR_R::new(((self.bits >> 4) & 1) != 0)
500    }
501    #[doc = "Bit 3 - One-pulse mode"]
502    #[inline(always)]
503    pub fn opm(&self) -> OPM_R {
504        OPM_R::new(((self.bits >> 3) & 1) != 0)
505    }
506    #[doc = "Bit 2 - Update request source"]
507    #[inline(always)]
508    pub fn urs(&self) -> URS_R {
509        URS_R::new(((self.bits >> 2) & 1) != 0)
510    }
511    #[doc = "Bit 1 - Update disable"]
512    #[inline(always)]
513    pub fn udis(&self) -> UDIS_R {
514        UDIS_R::new(((self.bits >> 1) & 1) != 0)
515    }
516    #[doc = "Bit 0 - Counter enable"]
517    #[inline(always)]
518    pub fn cen(&self) -> CEN_R {
519        CEN_R::new((self.bits & 1) != 0)
520    }
521}
522impl W {
523    #[doc = "Bits 8:9 - Clock division"]
524    #[inline(always)]
525    pub fn ckd(&mut self) -> CKD_W<8> {
526        CKD_W::new(self)
527    }
528    #[doc = "Bit 7 - Auto-reload preload enable"]
529    #[inline(always)]
530    pub fn arpe(&mut self) -> ARPE_W<7> {
531        ARPE_W::new(self)
532    }
533    #[doc = "Bits 5:6 - Center-aligned mode selection"]
534    #[inline(always)]
535    pub fn cms(&mut self) -> CMS_W<5> {
536        CMS_W::new(self)
537    }
538    #[doc = "Bit 4 - Direction"]
539    #[inline(always)]
540    pub fn dir(&mut self) -> DIR_W<4> {
541        DIR_W::new(self)
542    }
543    #[doc = "Bit 3 - One-pulse mode"]
544    #[inline(always)]
545    pub fn opm(&mut self) -> OPM_W<3> {
546        OPM_W::new(self)
547    }
548    #[doc = "Bit 2 - Update request source"]
549    #[inline(always)]
550    pub fn urs(&mut self) -> URS_W<2> {
551        URS_W::new(self)
552    }
553    #[doc = "Bit 1 - Update disable"]
554    #[inline(always)]
555    pub fn udis(&mut self) -> UDIS_W<1> {
556        UDIS_W::new(self)
557    }
558    #[doc = "Bit 0 - Counter enable"]
559    #[inline(always)]
560    pub fn cen(&mut self) -> CEN_W<0> {
561        CEN_W::new(self)
562    }
563    #[doc = "Writes raw bits to the register."]
564    #[inline(always)]
565    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
566        self.0.bits(bits);
567        self
568    }
569}
570#[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](index.html) module"]
571pub struct CR1_SPEC;
572impl crate::RegisterSpec for CR1_SPEC {
573    type Ux = u32;
574}
575#[doc = "`read()` method returns [cr1::R](R) reader structure"]
576impl crate::Readable for CR1_SPEC {
577    type Reader = R;
578}
579#[doc = "`write(|w| ..)` method takes [cr1::W](W) writer structure"]
580impl crate::Writable for CR1_SPEC {
581    type Writer = W;
582}
583#[doc = "`reset()` method sets CR1 to value 0"]
584impl crate::Resettable for CR1_SPEC {
585    #[inline(always)]
586    fn reset_value() -> Self::Ux {
587        0
588    }
589}
stm32f1/stm32f100/tim1/cr1.rs

stm32f1/stm32f100/tim1/
cr1.rs
