stm32f1/stm32f100/rcc/
cr.rs

1#[doc = "Register `CR` reader"]
2pub struct R(crate::R<CR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CR` writer"]
17pub struct W(crate::W<CR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Internal High Speed clock enable\n\nValue on reset: 1"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum HSION_A {
40    #[doc = "0: Clock Off"]
41    Off = 0,
42    #[doc = "1: Clock On"]
43    On = 1,
44}
45impl From<HSION_A> for bool {
46    #[inline(always)]
47    fn from(variant: HSION_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `HSION` reader - Internal High Speed clock enable"]
52pub type HSION_R = crate::BitReader<HSION_A>;
53impl HSION_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> HSION_A {
57        match self.bits {
58            false => HSION_A::Off,
59            true => HSION_A::On,
60        }
61    }
62    #[doc = "Checks if the value of the field is `Off`"]
63    #[inline(always)]
64    pub fn is_off(&self) -> bool {
65        *self == HSION_A::Off
66    }
67    #[doc = "Checks if the value of the field is `On`"]
68    #[inline(always)]
69    pub fn is_on(&self) -> bool {
70        *self == HSION_A::On
71    }
72}
73#[doc = "Field `HSION` writer - Internal High Speed clock enable"]
74pub type HSION_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, HSION_A, O>;
75impl<'a, const O: u8> HSION_W<'a, O> {
76    #[doc = "Clock Off"]
77    #[inline(always)]
78    pub fn off(self) -> &'a mut W {
79        self.variant(HSION_A::Off)
80    }
81    #[doc = "Clock On"]
82    #[inline(always)]
83    pub fn on(self) -> &'a mut W {
84        self.variant(HSION_A::On)
85    }
86}
87#[doc = "Internal High Speed clock ready flag\n\nValue on reset: 1"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum HSIRDY_A {
90    #[doc = "0: Clock not ready"]
91    NotReady = 0,
92    #[doc = "1: Clock ready"]
93    Ready = 1,
94}
95impl From<HSIRDY_A> for bool {
96    #[inline(always)]
97    fn from(variant: HSIRDY_A) -> Self {
98        variant as u8 != 0
99    }
100}
101#[doc = "Field `HSIRDY` reader - Internal High Speed clock ready flag"]
102pub type HSIRDY_R = crate::BitReader<HSIRDY_A>;
103impl HSIRDY_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> HSIRDY_A {
107        match self.bits {
108            false => HSIRDY_A::NotReady,
109            true => HSIRDY_A::Ready,
110        }
111    }
112    #[doc = "Checks if the value of the field is `NotReady`"]
113    #[inline(always)]
114    pub fn is_not_ready(&self) -> bool {
115        *self == HSIRDY_A::NotReady
116    }
117    #[doc = "Checks if the value of the field is `Ready`"]
118    #[inline(always)]
119    pub fn is_ready(&self) -> bool {
120        *self == HSIRDY_A::Ready
121    }
122}
123#[doc = "Field `HSITRIM` reader - Internal High Speed clock trimming"]
124pub type HSITRIM_R = crate::FieldReader<u8, u8>;
125#[doc = "Field `HSITRIM` writer - Internal High Speed clock trimming"]
126pub type HSITRIM_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CR_SPEC, u8, u8, 5, O>;
127#[doc = "Field `HSICAL` reader - Internal High Speed clock Calibration"]
128pub type HSICAL_R = crate::FieldReader<u8, u8>;
129#[doc = "External High Speed clock enable"]
130pub use HSION_A as HSEON_A;
131#[doc = "Field `HSEON` reader - External High Speed clock enable"]
132pub use HSION_R as HSEON_R;
133#[doc = "Field `HSEON` writer - External High Speed clock enable"]
134pub use HSION_W as HSEON_W;
135#[doc = "External High Speed clock ready flag"]
136pub use HSIRDY_A as HSERDY_A;
137#[doc = "Field `HSERDY` reader - External High Speed clock ready flag"]
138pub use HSIRDY_R as HSERDY_R;
139#[doc = "External High Speed clock Bypass\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum HSEBYP_A {
142    #[doc = "0: HSE crystal oscillator not bypassed"]
143    NotBypassed = 0,
144    #[doc = "1: HSE crystal oscillator bypassed with external clock"]
145    Bypassed = 1,
146}
147impl From<HSEBYP_A> for bool {
148    #[inline(always)]
149    fn from(variant: HSEBYP_A) -> Self {
150        variant as u8 != 0
151    }
152}
153#[doc = "Field `HSEBYP` reader - External High Speed clock Bypass"]
154pub type HSEBYP_R = crate::BitReader<HSEBYP_A>;
155impl HSEBYP_R {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub fn variant(&self) -> HSEBYP_A {
159        match self.bits {
160            false => HSEBYP_A::NotBypassed,
161            true => HSEBYP_A::Bypassed,
162        }
163    }
164    #[doc = "Checks if the value of the field is `NotBypassed`"]
165    #[inline(always)]
166    pub fn is_not_bypassed(&self) -> bool {
167        *self == HSEBYP_A::NotBypassed
168    }
169    #[doc = "Checks if the value of the field is `Bypassed`"]
170    #[inline(always)]
171    pub fn is_bypassed(&self) -> bool {
172        *self == HSEBYP_A::Bypassed
173    }
174}
175#[doc = "Field `HSEBYP` writer - External High Speed clock Bypass"]
176pub type HSEBYP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, HSEBYP_A, O>;
177impl<'a, const O: u8> HSEBYP_W<'a, O> {
178    #[doc = "HSE crystal oscillator not bypassed"]
179    #[inline(always)]
180    pub fn not_bypassed(self) -> &'a mut W {
181        self.variant(HSEBYP_A::NotBypassed)
182    }
183    #[doc = "HSE crystal oscillator bypassed with external clock"]
184    #[inline(always)]
185    pub fn bypassed(self) -> &'a mut W {
186        self.variant(HSEBYP_A::Bypassed)
187    }
188}
189#[doc = "Clock Security System enable\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq)]
191pub enum CSSON_A {
192    #[doc = "0: Clock security system disabled (clock detector OFF)"]
193    Off = 0,
194    #[doc = "1: Clock security system enable (clock detector ON if the HSE is ready, OFF if not)"]
195    On = 1,
196}
197impl From<CSSON_A> for bool {
198    #[inline(always)]
199    fn from(variant: CSSON_A) -> Self {
200        variant as u8 != 0
201    }
202}
203#[doc = "Field `CSSON` reader - Clock Security System enable"]
204pub type CSSON_R = crate::BitReader<CSSON_A>;
205impl CSSON_R {
206    #[doc = "Get enumerated values variant"]
207    #[inline(always)]
208    pub fn variant(&self) -> CSSON_A {
209        match self.bits {
210            false => CSSON_A::Off,
211            true => CSSON_A::On,
212        }
213    }
214    #[doc = "Checks if the value of the field is `Off`"]
215    #[inline(always)]
216    pub fn is_off(&self) -> bool {
217        *self == CSSON_A::Off
218    }
219    #[doc = "Checks if the value of the field is `On`"]
220    #[inline(always)]
221    pub fn is_on(&self) -> bool {
222        *self == CSSON_A::On
223    }
224}
225#[doc = "Field `CSSON` writer - Clock Security System enable"]
226pub type CSSON_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, CSSON_A, O>;
227impl<'a, const O: u8> CSSON_W<'a, O> {
228    #[doc = "Clock security system disabled (clock detector OFF)"]
229    #[inline(always)]
230    pub fn off(self) -> &'a mut W {
231        self.variant(CSSON_A::Off)
232    }
233    #[doc = "Clock security system enable (clock detector ON if the HSE is ready, OFF if not)"]
234    #[inline(always)]
235    pub fn on(self) -> &'a mut W {
236        self.variant(CSSON_A::On)
237    }
238}
239#[doc = "PLL enable"]
240pub use HSION_A as PLLON_A;
241#[doc = "Field `PLLON` reader - PLL enable"]
242pub use HSION_R as PLLON_R;
243#[doc = "Field `PLLON` writer - PLL enable"]
244pub use HSION_W as PLLON_W;
245#[doc = "PLL clock ready flag"]
246pub use HSIRDY_A as PLLRDY_A;
247#[doc = "Field `PLLRDY` reader - PLL clock ready flag"]
248pub use HSIRDY_R as PLLRDY_R;
249impl R {
250    #[doc = "Bit 0 - Internal High Speed clock enable"]
251    #[inline(always)]
252    pub fn hsion(&self) -> HSION_R {
253        HSION_R::new((self.bits & 1) != 0)
254    }
255    #[doc = "Bit 1 - Internal High Speed clock ready flag"]
256    #[inline(always)]
257    pub fn hsirdy(&self) -> HSIRDY_R {
258        HSIRDY_R::new(((self.bits >> 1) & 1) != 0)
259    }
260    #[doc = "Bits 3:7 - Internal High Speed clock trimming"]
261    #[inline(always)]
262    pub fn hsitrim(&self) -> HSITRIM_R {
263        HSITRIM_R::new(((self.bits >> 3) & 0x1f) as u8)
264    }
265    #[doc = "Bits 8:15 - Internal High Speed clock Calibration"]
266    #[inline(always)]
267    pub fn hsical(&self) -> HSICAL_R {
268        HSICAL_R::new(((self.bits >> 8) & 0xff) as u8)
269    }
270    #[doc = "Bit 16 - External High Speed clock enable"]
271    #[inline(always)]
272    pub fn hseon(&self) -> HSEON_R {
273        HSEON_R::new(((self.bits >> 16) & 1) != 0)
274    }
275    #[doc = "Bit 17 - External High Speed clock ready flag"]
276    #[inline(always)]
277    pub fn hserdy(&self) -> HSERDY_R {
278        HSERDY_R::new(((self.bits >> 17) & 1) != 0)
279    }
280    #[doc = "Bit 18 - External High Speed clock Bypass"]
281    #[inline(always)]
282    pub fn hsebyp(&self) -> HSEBYP_R {
283        HSEBYP_R::new(((self.bits >> 18) & 1) != 0)
284    }
285    #[doc = "Bit 19 - Clock Security System enable"]
286    #[inline(always)]
287    pub fn csson(&self) -> CSSON_R {
288        CSSON_R::new(((self.bits >> 19) & 1) != 0)
289    }
290    #[doc = "Bit 24 - PLL enable"]
291    #[inline(always)]
292    pub fn pllon(&self) -> PLLON_R {
293        PLLON_R::new(((self.bits >> 24) & 1) != 0)
294    }
295    #[doc = "Bit 25 - PLL clock ready flag"]
296    #[inline(always)]
297    pub fn pllrdy(&self) -> PLLRDY_R {
298        PLLRDY_R::new(((self.bits >> 25) & 1) != 0)
299    }
300}
301impl W {
302    #[doc = "Bit 0 - Internal High Speed clock enable"]
303    #[inline(always)]
304    pub fn hsion(&mut self) -> HSION_W<0> {
305        HSION_W::new(self)
306    }
307    #[doc = "Bits 3:7 - Internal High Speed clock trimming"]
308    #[inline(always)]
309    pub fn hsitrim(&mut self) -> HSITRIM_W<3> {
310        HSITRIM_W::new(self)
311    }
312    #[doc = "Bit 16 - External High Speed clock enable"]
313    #[inline(always)]
314    pub fn hseon(&mut self) -> HSEON_W<16> {
315        HSEON_W::new(self)
316    }
317    #[doc = "Bit 18 - External High Speed clock Bypass"]
318    #[inline(always)]
319    pub fn hsebyp(&mut self) -> HSEBYP_W<18> {
320        HSEBYP_W::new(self)
321    }
322    #[doc = "Bit 19 - Clock Security System enable"]
323    #[inline(always)]
324    pub fn csson(&mut self) -> CSSON_W<19> {
325        CSSON_W::new(self)
326    }
327    #[doc = "Bit 24 - PLL enable"]
328    #[inline(always)]
329    pub fn pllon(&mut self) -> PLLON_W<24> {
330        PLLON_W::new(self)
331    }
332    #[doc = "Writes raw bits to the register."]
333    #[inline(always)]
334    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
335        self.0.bits(bits);
336        self
337    }
338}
339#[doc = "Clock control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
340pub struct CR_SPEC;
341impl crate::RegisterSpec for CR_SPEC {
342    type Ux = u32;
343}
344#[doc = "`read()` method returns [cr::R](R) reader structure"]
345impl crate::Readable for CR_SPEC {
346    type Reader = R;
347}
348#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
349impl crate::Writable for CR_SPEC {
350    type Writer = W;
351}
352#[doc = "`reset()` method sets CR to value 0x83"]
353impl crate::Resettable for CR_SPEC {
354    #[inline(always)]
355    fn reset_value() -> Self::Ux {
356        0x83
357    }
358}
stm32f1/stm32f100/rcc/cr.rs

stm32f1/stm32f100/rcc/
cr.rs
