stm32f1/stm32f100/pwr/
csr.rs

1#[doc = "Register `CSR` reader"]
2pub struct R(crate::R<CSR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CSR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CSR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CSR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CSR` writer"]
17pub struct W(crate::W<CSR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CSR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CSR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CSR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `WUF` reader - Wake-Up Flag"]
38pub type WUF_R = crate::BitReader<bool>;
39#[doc = "Field `SBF` reader - STANDBY Flag"]
40pub type SBF_R = crate::BitReader<bool>;
41#[doc = "Field `PVDO` reader - PVD Output"]
42pub type PVDO_R = crate::BitReader<bool>;
43#[doc = "Field `EWUP` reader - Enable WKUP pin"]
44pub type EWUP_R = crate::BitReader<bool>;
45#[doc = "Field `EWUP` writer - Enable WKUP pin"]
46pub type EWUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CSR_SPEC, bool, O>;
47impl R {
48    #[doc = "Bit 0 - Wake-Up Flag"]
49    #[inline(always)]
50    pub fn wuf(&self) -> WUF_R {
51        WUF_R::new((self.bits & 1) != 0)
52    }
53    #[doc = "Bit 1 - STANDBY Flag"]
54    #[inline(always)]
55    pub fn sbf(&self) -> SBF_R {
56        SBF_R::new(((self.bits >> 1) & 1) != 0)
57    }
58    #[doc = "Bit 2 - PVD Output"]
59    #[inline(always)]
60    pub fn pvdo(&self) -> PVDO_R {
61        PVDO_R::new(((self.bits >> 2) & 1) != 0)
62    }
63    #[doc = "Bit 8 - Enable WKUP pin"]
64    #[inline(always)]
65    pub fn ewup(&self) -> EWUP_R {
66        EWUP_R::new(((self.bits >> 8) & 1) != 0)
67    }
68}
69impl W {
70    #[doc = "Bit 8 - Enable WKUP pin"]
71    #[inline(always)]
72    pub fn ewup(&mut self) -> EWUP_W<8> {
73        EWUP_W::new(self)
74    }
75    #[doc = "Writes raw bits to the register."]
76    #[inline(always)]
77    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
78        self.0.bits(bits);
79        self
80    }
81}
82#[doc = "Power control register (PWR_CR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csr](index.html) module"]
83pub struct CSR_SPEC;
84impl crate::RegisterSpec for CSR_SPEC {
85    type Ux = u32;
86}
87#[doc = "`read()` method returns [csr::R](R) reader structure"]
88impl crate::Readable for CSR_SPEC {
89    type Reader = R;
90}
91#[doc = "`write(|w| ..)` method takes [csr::W](W) writer structure"]
92impl crate::Writable for CSR_SPEC {
93    type Writer = W;
94}
95#[doc = "`reset()` method sets CSR to value 0"]
96impl crate::Resettable for CSR_SPEC {
97    #[inline(always)]
98    fn reset_value() -> Self::Ux {
99        0
100    }
101}
stm32f1/stm32f100/pwr/csr.rs

stm32f1/stm32f100/pwr/
csr.rs
