Struct stm32f1::stm32f101::ethernet_dma::dmasr::W

pub struct W(_);

Register DMASR writer

Implementations

impl W

pub fn ts(&mut self) -> TS_W<'_>

Bit 0 - Transmit status

pub fn tpss(&mut self) -> TPSS_W<'_>

Bit 1 - Transmit process stopped status

pub fn tbus(&mut self) -> TBUS_W<'_>

Bit 2 - Transmit buffer unavailable status

pub fn tjts(&mut self) -> TJTS_W<'_>

Bit 3 - Transmit jabber timeout status

pub fn ros(&mut self) -> ROS_W<'_>

Bit 4 - Receive overflow status

pub fn tus(&mut self) -> TUS_W<'_>

Bit 5 - Transmit underflow status

pub fn rs(&mut self) -> RS_W<'_>

Bit 6 - Receive status

pub fn rbus(&mut self) -> RBUS_W<'_>

Bit 7 - Receive buffer unavailable status

pub fn rpss(&mut self) -> RPSS_W<'_>

Bit 8 - Receive process stopped status

pub fn pwts(&mut self) -> PWTS_W<'_>

Bit 9 - Receive watchdog timeout status

pub fn ets(&mut self) -> ETS_W<'_>

Bit 10 - Early transmit status

pub fn fbes(&mut self) -> FBES_W<'_>

Bit 13 - Fatal bus error status

pub fn ers(&mut self) -> ERS_W<'_>

Bit 14 - Early receive status

pub fn ais(&mut self) -> AIS_W<'_>

Bit 15 - Abnormal interrupt summary

pub fn nis(&mut self) -> NIS_W<'_>

Bit 16 - Normal interrupt summary

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<DMASR_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<DMASR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<DMASR_SPEC>> for W

fn from(writer: W<DMASR_SPEC>) -> Self

Performs the conversion.