1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527
#[doc = "Reader of register MAPR"] pub type R = crate::R<u32, super::MAPR>; #[doc = "Writer for register MAPR"] pub type W = crate::W<u32, super::MAPR>; #[doc = "Register MAPR `reset()`'s with value 0"] impl crate::ResetValue for super::MAPR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `SPI1_REMAP`"] pub type SPI1_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SPI1_REMAP`"] pub struct SPI1_REMAP_W<'a> { w: &'a mut W, } impl<'a> SPI1_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `I2C1_REMAP`"] pub type I2C1_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C1_REMAP`"] pub struct I2C1_REMAP_W<'a> { w: &'a mut W, } impl<'a> I2C1_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `USART1_REMAP`"] pub type USART1_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART1_REMAP`"] pub struct USART1_REMAP_W<'a> { w: &'a mut W, } impl<'a> USART1_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `USART2_REMAP`"] pub type USART2_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART2_REMAP`"] pub struct USART2_REMAP_W<'a> { w: &'a mut W, } impl<'a> USART2_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `USART3_REMAP`"] pub type USART3_REMAP_R = crate::R<u8, u8>; #[doc = "Write proxy for field `USART3_REMAP`"] pub struct USART3_REMAP_W<'a> { w: &'a mut W, } impl<'a> USART3_REMAP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4); self.w } } #[doc = "Reader of field `TIM1_REMAP`"] pub type TIM1_REMAP_R = crate::R<u8, u8>; #[doc = "Write proxy for field `TIM1_REMAP`"] pub struct TIM1_REMAP_W<'a> { w: &'a mut W, } impl<'a> TIM1_REMAP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6); self.w } } #[doc = "Reader of field `TIM2_REMAP`"] pub type TIM2_REMAP_R = crate::R<u8, u8>; #[doc = "Write proxy for field `TIM2_REMAP`"] pub struct TIM2_REMAP_W<'a> { w: &'a mut W, } impl<'a> TIM2_REMAP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8); self.w } } #[doc = "Reader of field `TIM3_REMAP`"] pub type TIM3_REMAP_R = crate::R<u8, u8>; #[doc = "Write proxy for field `TIM3_REMAP`"] pub struct TIM3_REMAP_W<'a> { w: &'a mut W, } impl<'a> TIM3_REMAP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10); self.w } } #[doc = "Reader of field `TIM4_REMAP`"] pub type TIM4_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM4_REMAP`"] pub struct TIM4_REMAP_W<'a> { w: &'a mut W, } impl<'a> TIM4_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "Reader of field `CAN_REMAP`"] pub type CAN_REMAP_R = crate::R<u8, u8>; #[doc = "Write proxy for field `CAN_REMAP`"] pub struct CAN_REMAP_W<'a> { w: &'a mut W, } impl<'a> CAN_REMAP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 13)) | (((value as u32) & 0x03) << 13); self.w } } #[doc = "Reader of field `PD01_REMAP`"] pub type PD01_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PD01_REMAP`"] pub struct PD01_REMAP_W<'a> { w: &'a mut W, } impl<'a> PD01_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = "Reader of field `TIM5CH4_IREMAP`"] pub type TIM5CH4_IREMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM5CH4_IREMAP`"] pub struct TIM5CH4_IREMAP_W<'a> { w: &'a mut W, } impl<'a> TIM5CH4_IREMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } #[doc = "Reader of field `ADC1_ETRGINJ_REMAP`"] pub type ADC1_ETRGINJ_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC1_ETRGINJ_REMAP`"] pub struct ADC1_ETRGINJ_REMAP_W<'a> { w: &'a mut W, } impl<'a> ADC1_ETRGINJ_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `ADC1_ETRGREG_REMAP`"] pub type ADC1_ETRGREG_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC1_ETRGREG_REMAP`"] pub struct ADC1_ETRGREG_REMAP_W<'a> { w: &'a mut W, } impl<'a> ADC1_ETRGREG_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `ADC2_ETRGINJ_REMAP`"] pub type ADC2_ETRGINJ_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC2_ETRGINJ_REMAP`"] pub struct ADC2_ETRGINJ_REMAP_W<'a> { w: &'a mut W, } impl<'a> ADC2_ETRGINJ_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Reader of field `ADC2_ETRGREG_REMAP`"] pub type ADC2_ETRGREG_REMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ADC2_ETRGREG_REMAP`"] pub struct ADC2_ETRGREG_REMAP_W<'a> { w: &'a mut W, } impl<'a> ADC2_ETRGREG_REMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } #[doc = "Write proxy for field `SWJ_CFG`"] pub struct SWJ_CFG_W<'a> { w: &'a mut W, } impl<'a> SWJ_CFG_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24); self.w } } impl R { #[doc = "Bit 0 - SPI1 remapping"] #[inline(always)] pub fn spi1_remap(&self) -> SPI1_REMAP_R { SPI1_REMAP_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - I2C1 remapping"] #[inline(always)] pub fn i2c1_remap(&self) -> I2C1_REMAP_R { I2C1_REMAP_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - USART1 remapping"] #[inline(always)] pub fn usart1_remap(&self) -> USART1_REMAP_R { USART1_REMAP_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - USART2 remapping"] #[inline(always)] pub fn usart2_remap(&self) -> USART2_REMAP_R { USART2_REMAP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bits 4:5 - USART3 remapping"] #[inline(always)] pub fn usart3_remap(&self) -> USART3_REMAP_R { USART3_REMAP_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 6:7 - TIM1 remapping"] #[inline(always)] pub fn tim1_remap(&self) -> TIM1_REMAP_R { TIM1_REMAP_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 8:9 - TIM2 remapping"] #[inline(always)] pub fn tim2_remap(&self) -> TIM2_REMAP_R { TIM2_REMAP_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - TIM3 remapping"] #[inline(always)] pub fn tim3_remap(&self) -> TIM3_REMAP_R { TIM3_REMAP_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bit 12 - TIM4 remapping"] #[inline(always)] pub fn tim4_remap(&self) -> TIM4_REMAP_R { TIM4_REMAP_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bits 13:14 - CAN1 remapping"] #[inline(always)] pub fn can_remap(&self) -> CAN_REMAP_R { CAN_REMAP_R::new(((self.bits >> 13) & 0x03) as u8) } #[doc = "Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT"] #[inline(always)] pub fn pd01_remap(&self) -> PD01_REMAP_R { PD01_REMAP_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Set and cleared by software"] #[inline(always)] pub fn tim5ch4_iremap(&self) -> TIM5CH4_IREMAP_R { TIM5CH4_IREMAP_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - ADC 1 External trigger injected conversion remapping"] #[inline(always)] pub fn adc1_etrginj_remap(&self) -> ADC1_ETRGINJ_REMAP_R { ADC1_ETRGINJ_REMAP_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - ADC 1 external trigger regular conversion remapping"] #[inline(always)] pub fn adc1_etrgreg_remap(&self) -> ADC1_ETRGREG_REMAP_R { ADC1_ETRGREG_REMAP_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - ADC 2 external trigger injected conversion remapping"] #[inline(always)] pub fn adc2_etrginj_remap(&self) -> ADC2_ETRGINJ_REMAP_R { ADC2_ETRGINJ_REMAP_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - ADC 2 external trigger regular conversion remapping"] #[inline(always)] pub fn adc2_etrgreg_remap(&self) -> ADC2_ETRGREG_REMAP_R { ADC2_ETRGREG_REMAP_R::new(((self.bits >> 20) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - SPI1 remapping"] #[inline(always)] pub fn spi1_remap(&mut self) -> SPI1_REMAP_W { SPI1_REMAP_W { w: self } } #[doc = "Bit 1 - I2C1 remapping"] #[inline(always)] pub fn i2c1_remap(&mut self) -> I2C1_REMAP_W { I2C1_REMAP_W { w: self } } #[doc = "Bit 2 - USART1 remapping"] #[inline(always)] pub fn usart1_remap(&mut self) -> USART1_REMAP_W { USART1_REMAP_W { w: self } } #[doc = "Bit 3 - USART2 remapping"] #[inline(always)] pub fn usart2_remap(&mut self) -> USART2_REMAP_W { USART2_REMAP_W { w: self } } #[doc = "Bits 4:5 - USART3 remapping"] #[inline(always)] pub fn usart3_remap(&mut self) -> USART3_REMAP_W { USART3_REMAP_W { w: self } } #[doc = "Bits 6:7 - TIM1 remapping"] #[inline(always)] pub fn tim1_remap(&mut self) -> TIM1_REMAP_W { TIM1_REMAP_W { w: self } } #[doc = "Bits 8:9 - TIM2 remapping"] #[inline(always)] pub fn tim2_remap(&mut self) -> TIM2_REMAP_W { TIM2_REMAP_W { w: self } } #[doc = "Bits 10:11 - TIM3 remapping"] #[inline(always)] pub fn tim3_remap(&mut self) -> TIM3_REMAP_W { TIM3_REMAP_W { w: self } } #[doc = "Bit 12 - TIM4 remapping"] #[inline(always)] pub fn tim4_remap(&mut self) -> TIM4_REMAP_W { TIM4_REMAP_W { w: self } } #[doc = "Bits 13:14 - CAN1 remapping"] #[inline(always)] pub fn can_remap(&mut self) -> CAN_REMAP_W { CAN_REMAP_W { w: self } } #[doc = "Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT"] #[inline(always)] pub fn pd01_remap(&mut self) -> PD01_REMAP_W { PD01_REMAP_W { w: self } } #[doc = "Bit 16 - Set and cleared by software"] #[inline(always)] pub fn tim5ch4_iremap(&mut self) -> TIM5CH4_IREMAP_W { TIM5CH4_IREMAP_W { w: self } } #[doc = "Bit 17 - ADC 1 External trigger injected conversion remapping"] #[inline(always)] pub fn adc1_etrginj_remap(&mut self) -> ADC1_ETRGINJ_REMAP_W { ADC1_ETRGINJ_REMAP_W { w: self } } #[doc = "Bit 18 - ADC 1 external trigger regular conversion remapping"] #[inline(always)] pub fn adc1_etrgreg_remap(&mut self) -> ADC1_ETRGREG_REMAP_W { ADC1_ETRGREG_REMAP_W { w: self } } #[doc = "Bit 19 - ADC 2 external trigger injected conversion remapping"] #[inline(always)] pub fn adc2_etrginj_remap(&mut self) -> ADC2_ETRGINJ_REMAP_W { ADC2_ETRGINJ_REMAP_W { w: self } } #[doc = "Bit 20 - ADC 2 external trigger regular conversion remapping"] #[inline(always)] pub fn adc2_etrgreg_remap(&mut self) -> ADC2_ETRGREG_REMAP_W { ADC2_ETRGREG_REMAP_W { w: self } } #[doc = "Bits 24:26 - Serial wire JTAG configuration"] #[inline(always)] pub fn swj_cfg(&mut self) -> SWJ_CFG_W { SWJ_CFG_W { w: self } } }