Module cr 

Clock control register

Re-exports

pub use HSION_R as HSEON_R;

pub use HSION_W as HSEON_W;

pub use HSIRDY_R as HSERDY_R;

pub use HSION_R as PLLON_R;

pub use HSION_W as PLLON_W;

pub use HSIRDY_R as PLLRDY_R;

pub use HSIRDY_R as PLL2RDY_R;

pub use HSIRDY_R as PLL3RDY_R;

Structs

CRrs

Clock control register

Enums

CSSON

Clock Security System enable

HSEBYP

External High Speed clock Bypass

HSION

Internal High Speed clock enable

HSIRDYR

Internal High Speed clock ready flag

Type Aliases

CSSON_R

Field CSSON reader - Clock Security System enable

CSSON_W

Field CSSON writer - Clock Security System enable

HSEBYP_R

Field HSEBYP reader - External High Speed clock Bypass

HSEBYP_W

Field HSEBYP writer - External High Speed clock Bypass

HSICAL_R

Field HSICAL reader - Internal High Speed clock Calibration

HSION_R

Field HSION reader - Internal High Speed clock enable

HSION_W

Field HSION writer - Internal High Speed clock enable

HSIRDY_R

Field HSIRDY reader - Internal High Speed clock ready flag

HSITRIM_R

Field HSITRIM reader - Internal High Speed clock trimming

HSITRIM_W

Field HSITRIM writer - Internal High Speed clock trimming

PLL2ON_R

Field PLL2ON reader - PLL2 enable

PLL2ON_W

Field PLL2ON writer - PLL2 enable

PLL3ON_R

Field PLL3ON reader - PLL3 enable

PLL3ON_W

Field PLL3ON writer - PLL3 enable

R

Register CR reader

W

Register CR writer