Expand description
Clock configuration register2 (RCC_CFGR2)
Re-exports§
pub use PREDIV1_R as PREDIV2_R;pub use PREDIV1_W as PREDIV2_W;pub use PLL2MUL_R as PLL3MUL_R;pub use PLL2MUL_W as PLL3MUL_W;pub use I2S2SRC_R as I2S3SRC_R;pub use I2S2SRC_W as I2S3SRC_W;
Structs§
- CFGR2rs
- Clock configuration register2 (RCC_CFGR2)
Enums§
- I2S2SRC
- I2S2 clock source
- PLL2MUL
- PLL2 Multiplication Factor
- PREDIV1
- PREDIV1 division factor
- PREDI
V1SRC - PREDIV1 entry clock source
Type Aliases§
- I2S2SRC_
R - Field
I2S2SRCreader - I2S2 clock source - I2S2SRC_
W - Field
I2S2SRCwriter - I2S2 clock source - PLL2MUL_
R - Field
PLL2MULreader - PLL2 Multiplication Factor - PLL2MUL_
W - Field
PLL2MULwriter - PLL2 Multiplication Factor - PREDI
V1SRC_ R - Field
PREDIV1SRCreader - PREDIV1 entry clock source - PREDI
V1SRC_ W - Field
PREDIV1SRCwriter - PREDIV1 entry clock source - PREDI
V1_ R - Field
PREDIV1reader - PREDIV1 division factor - PREDI
V1_ W - Field
PREDIV1writer - PREDIV1 division factor - R
- Register
CFGR2reader - W
- Register
CFGR2writer