Module crl

stm32f1_staging::stm32f107::gpioa

Module crl

Expand description

Port configuration register low (GPIOn_CRL)

Structs§

CRLrs: Port configuration register low (GPIOn_CRL)

Enums§

CONFIG: Port n.%s configuration bits
MODE: Port n.%s mode bits

Type Aliases§

CNF_R: Field CNF(0-7) reader - Port n.%s configuration bits
CNF_W: Field CNF(0-7) writer - Port n.%s configuration bits
MODE_R: Field MODE(0-7) reader - Port n.%s mode bits
MODE_W: Field MODE(0-7) writer - Port n.%s mode bits
R: Register CRL reader
W: Register CRL writer