stm32f1_staging/stm32f107/sdio/
dtimer.rs

1///Register `DTIMER` reader
2pub type R = crate::R<DTIMERrs>;
3///Register `DTIMER` writer
4pub type W = crate::W<DTIMERrs>;
5///Field `DATATIME` reader - Data timeout period
6pub type DATATIME_R = crate::FieldReader<u32>;
7///Field `DATATIME` writer - Data timeout period
8pub type DATATIME_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    ///Bits 0:31 - Data timeout period
11    #[inline(always)]
12    pub fn datatime(&self) -> DATATIME_R {
13        DATATIME_R::new(self.bits)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("DTIMER").field("datatime", &self.datatime()).finish()
19    }
20}
21impl W {
22    ///Bits 0:31 - Data timeout period
23    #[inline(always)]
24    pub fn datatime(&mut self) -> DATATIME_W<DTIMERrs> {
25        DATATIME_W::new(self, 0)
26    }
27}
28/**data timer register
29
30You can [`read`](crate::Reg::read) this register and get [`dtimer::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dtimer::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
31
32See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F107.html#SDIO:DTIMER)*/
33pub struct DTIMERrs;
34impl crate::RegisterSpec for DTIMERrs {
35    type Ux = u32;
36}
37///`read()` method returns [`dtimer::R`](R) reader structure
38impl crate::Readable for DTIMERrs {}
39///`write(|w| ..)` method takes [`dtimer::W`](W) writer structure
40impl crate::Writable for DTIMERrs {
41    type Safety = crate::Unsafe;
42}
43///`reset()` method sets DTIMER to value 0
44impl crate::Resettable for DTIMERrs {}
stm32f1_staging/stm32f107/sdio/dtimer.rs

stm32f1_staging/stm32f107/sdio/
dtimer.rs
