stm32f1_staging/stm32f103/crc/
cr.rs

1///Register `CR` writer
2pub type W = crate::W<CRrs>;
3/**Reset bit
4
5Value on reset: 0*/
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum RESETW {
9    ///1: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF
10    Reset = 1,
11}
12impl From<RESETW> for bool {
13    #[inline(always)]
14    fn from(variant: RESETW) -> Self {
15        variant as u8 != 0
16    }
17}
18///Field `RESET` writer - Reset bit
19pub type RESET_W<'a, REG> = crate::BitWriter<'a, REG, RESETW>;
20impl<'a, REG> RESET_W<'a, REG>
21where
22    REG: crate::Writable + crate::RegisterSpec,
23{
24    ///Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF
25    #[inline(always)]
26    pub fn reset(self) -> &'a mut crate::W<REG> {
27        self.variant(RESETW::Reset)
28    }
29}
30impl core::fmt::Debug for crate::generic::Reg<CRrs> {
31    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
32        write!(f, "(not readable)")
33    }
34}
35impl W {
36    ///Bit 0 - Reset bit
37    #[inline(always)]
38    pub fn reset(&mut self) -> RESET_W<CRrs> {
39        RESET_W::new(self, 0)
40    }
41}
42/**Control register
43
44You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
45
46See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F103.html#CRC:CR)*/
47pub struct CRrs;
48impl crate::RegisterSpec for CRrs {
49    type Ux = u32;
50}
51///`write(|w| ..)` method takes [`cr::W`](W) writer structure
52impl crate::Writable for CRrs {
53    type Safety = crate::Unsafe;
54}
55///`reset()` method sets CR to value 0
56impl crate::Resettable for CRrs {}
stm32f1_staging/stm32f103/crc/cr.rs

stm32f1_staging/stm32f103/crc/
cr.rs
