stm32f1_staging/stm32f103/can/rx.rs
1#[repr(C)]
2#[derive(Debug)]
3///CAN Receive cluster
4pub struct RX {
5 rir: RIR,
6 rdtr: RDTR,
7 rdlr: RDLR,
8 rdhr: RDHR,
9}
10impl RX {
11 ///0x00 - CAN_RI0R
12 #[inline(always)]
13 pub const fn rir(&self) -> &RIR {
14 &self.rir
15 }
16 ///0x04 - CAN_RDT0R
17 #[inline(always)]
18 pub const fn rdtr(&self) -> &RDTR {
19 &self.rdtr
20 }
21 ///0x08 - CAN_RDL0R
22 #[inline(always)]
23 pub const fn rdlr(&self) -> &RDLR {
24 &self.rdlr
25 }
26 ///0x0c - CAN_RDH0R
27 #[inline(always)]
28 pub const fn rdhr(&self) -> &RDHR {
29 &self.rdhr
30 }
31}
32/**RIR (r) register accessor: CAN_RI0R
33
34You can [`read`](crate::Reg::read) this register and get [`rir::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
35
36For information about available fields see [`mod@rir`] module*/
37pub type RIR = crate::Reg<rir::RIRrs>;
38///CAN_RI0R
39pub mod rir;
40/**RDTR (r) register accessor: CAN_RDT0R
41
42You can [`read`](crate::Reg::read) this register and get [`rdtr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
43
44For information about available fields see [`mod@rdtr`] module*/
45pub type RDTR = crate::Reg<rdtr::RDTRrs>;
46///CAN_RDT0R
47pub mod rdtr;
48/**RDLR (r) register accessor: CAN_RDL0R
49
50You can [`read`](crate::Reg::read) this register and get [`rdlr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
51
52For information about available fields see [`mod@rdlr`] module*/
53pub type RDLR = crate::Reg<rdlr::RDLRrs>;
54///CAN_RDL0R
55pub mod rdlr;
56/**RDHR (r) register accessor: CAN_RDH0R
57
58You can [`read`](crate::Reg::read) this register and get [`rdhr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
59
60For information about available fields see [`mod@rdhr`] module*/
61pub type RDHR = crate::Reg<rdhr::RDHRrs>;
62///CAN_RDH0R
63pub mod rdhr;