stm32f1_staging/stm32f101/rtc/
alrl.rs

1///Register `ALRL` writer
2pub type W = crate::W<ALRLrs>;
3///Field `ALRL` writer - RTC alarm register low
4pub type ALRL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16, crate::Safe>;
5impl core::fmt::Debug for crate::generic::Reg<ALRLrs> {
6    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
7        write!(f, "(not readable)")
8    }
9}
10impl W {
11    ///Bits 0:15 - RTC alarm register low
12    #[inline(always)]
13    pub fn alrl(&mut self) -> ALRL_W<ALRLrs> {
14        ALRL_W::new(self, 0)
15    }
16}
17/**RTC Alarm Register Low
18
19You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`alrl::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
20
21See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F101.html#RTC:ALRL)*/
22pub struct ALRLrs;
23impl crate::RegisterSpec for ALRLrs {
24    type Ux = u32;
25}
26///`write(|w| ..)` method takes [`alrl::W`](W) writer structure
27impl crate::Writable for ALRLrs {
28    type Safety = crate::Unsafe;
29}
30///`reset()` method sets ALRL to value 0xffff
31impl crate::Resettable for ALRLrs {
32    const RESET_VALUE: u32 = 0xffff;
33}