stm32f1_staging/stm32f100/
cec.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cfgr: CFGR,
6    oar: OAR,
7    pres: PRES,
8    esr: ESR,
9    csr: CSR,
10    txd: TXD,
11    rxd: RXD,
12}
13impl RegisterBlock {
14    ///0x00 - configuration register
15    #[inline(always)]
16    pub const fn cfgr(&self) -> &CFGR {
17        &self.cfgr
18    }
19    ///0x04 - CEC own address register
20    #[inline(always)]
21    pub const fn oar(&self) -> &OAR {
22        &self.oar
23    }
24    ///0x08 - Rx Data Register
25    #[inline(always)]
26    pub const fn pres(&self) -> &PRES {
27        &self.pres
28    }
29    ///0x0c - CEC error status register
30    #[inline(always)]
31    pub const fn esr(&self) -> &ESR {
32        &self.esr
33    }
34    ///0x10 - CEC control and status register
35    #[inline(always)]
36    pub const fn csr(&self) -> &CSR {
37        &self.csr
38    }
39    ///0x14 - CEC Tx data register
40    #[inline(always)]
41    pub const fn txd(&self) -> &TXD {
42        &self.txd
43    }
44    ///0x18 - CEC Rx data register
45    #[inline(always)]
46    pub const fn rxd(&self) -> &RXD {
47        &self.rxd
48    }
49}
50/**CFGR (rw) register accessor: configuration register
51
52You can [`read`](crate::Reg::read) this register and get [`cfgr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
53
54See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:CFGR)
55
56For information about available fields see [`mod@cfgr`] module*/
57pub type CFGR = crate::Reg<cfgr::CFGRrs>;
58///configuration register
59pub mod cfgr;
60/**OAR (rw) register accessor: CEC own address register
61
62You can [`read`](crate::Reg::read) this register and get [`oar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`oar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
63
64See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:OAR)
65
66For information about available fields see [`mod@oar`] module*/
67pub type OAR = crate::Reg<oar::OARrs>;
68///CEC own address register
69pub mod oar;
70/**PRES (rw) register accessor: Rx Data Register
71
72You can [`read`](crate::Reg::read) this register and get [`pres::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pres::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
73
74See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:PRES)
75
76For information about available fields see [`mod@pres`] module*/
77pub type PRES = crate::Reg<pres::PRESrs>;
78///Rx Data Register
79pub mod pres;
80/**ESR (r) register accessor: CEC error status register
81
82You can [`read`](crate::Reg::read) this register and get [`esr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
83
84See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:ESR)
85
86For information about available fields see [`mod@esr`] module*/
87pub type ESR = crate::Reg<esr::ESRrs>;
88///CEC error status register
89pub mod esr;
90/**CSR (rw) register accessor: CEC control and status register
91
92You can [`read`](crate::Reg::read) this register and get [`csr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
93
94See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:CSR)
95
96For information about available fields see [`mod@csr`] module*/
97pub type CSR = crate::Reg<csr::CSRrs>;
98///CEC control and status register
99pub mod csr;
100/**TXD (rw) register accessor: CEC Tx data register
101
102You can [`read`](crate::Reg::read) this register and get [`txd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
103
104See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:TXD)
105
106For information about available fields see [`mod@txd`] module*/
107pub type TXD = crate::Reg<txd::TXDrs>;
108///CEC Tx data register
109pub mod txd;
110/**RXD (r) register accessor: CEC Rx data register
111
112You can [`read`](crate::Reg::read) this register and get [`rxd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
113
114See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F100.html#CEC:RXD)
115
116For information about available fields see [`mod@rxd`] module*/
117pub type RXD = crate::Reg<rxd::RXDrs>;
118///CEC Rx data register
119pub mod rxd;
stm32f1_staging/stm32f100/cec.rs

stm32f1_staging/stm32f100/
cec.rs
