stm32f1_staging/stm32f103/usb/
istr.rs

1///Register `ISTR` reader
2pub type R = crate::R<ISTRrs>;
3///Register `ISTR` writer
4pub type W = crate::W<ISTRrs>;
5///Field `EP_ID` reader - Endpoint Identifier
6pub type EP_ID_R = crate::FieldReader;
7///Field `EP_ID` writer - Endpoint Identifier
8pub type EP_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 4, u8, crate::Safe>;
9/**Direction of transaction
10
11Value on reset: 0*/
12#[cfg_attr(feature = "defmt", derive(defmt::Format))]
13#[derive(Clone, Copy, Debug, PartialEq, Eq)]
14pub enum DIR {
15    ///0: data transmitted by the USB peripheral to the host PC
16    To = 0,
17    ///1: data received by the USB peripheral from the host PC
18    From = 1,
19}
20impl From<DIR> for bool {
21    #[inline(always)]
22    fn from(variant: DIR) -> Self {
23        variant as u8 != 0
24    }
25}
26///Field `DIR` reader - Direction of transaction
27pub type DIR_R = crate::BitReader<DIR>;
28impl DIR_R {
29    ///Get enumerated values variant
30    #[inline(always)]
31    pub const fn variant(&self) -> DIR {
32        match self.bits {
33            false => DIR::To,
34            true => DIR::From,
35        }
36    }
37    ///data transmitted by the USB peripheral to the host PC
38    #[inline(always)]
39    pub fn is_to(&self) -> bool {
40        *self == DIR::To
41    }
42    ///data received by the USB peripheral from the host PC
43    #[inline(always)]
44    pub fn is_from(&self) -> bool {
45        *self == DIR::From
46    }
47}
48///Field `DIR` writer - Direction of transaction
49pub type DIR_W<'a, REG> = crate::BitWriter<'a, REG, DIR>;
50impl<'a, REG> DIR_W<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53{
54    ///data transmitted by the USB peripheral to the host PC
55    #[inline(always)]
56    pub fn to(self) -> &'a mut crate::W<REG> {
57        self.variant(DIR::To)
58    }
59    ///data received by the USB peripheral from the host PC
60    #[inline(always)]
61    pub fn from(self) -> &'a mut crate::W<REG> {
62        self.variant(DIR::From)
63    }
64}
65/**Expected start frame
66
67Value on reset: 0*/
68#[cfg_attr(feature = "defmt", derive(defmt::Format))]
69#[derive(Clone, Copy, Debug, PartialEq, Eq)]
70pub enum ESOFR {
71    ///0: NotExpectedStartOfFrame
72    NotExpectedStartOfFrame = 0,
73    ///1: an SOF packet is expected but not received
74    ExpectedStartOfFrame = 1,
75}
76impl From<ESOFR> for bool {
77    #[inline(always)]
78    fn from(variant: ESOFR) -> Self {
79        variant as u8 != 0
80    }
81}
82///Field `ESOF` reader - Expected start frame
83pub type ESOF_R = crate::BitReader<ESOFR>;
84impl ESOF_R {
85    ///Get enumerated values variant
86    #[inline(always)]
87    pub const fn variant(&self) -> ESOFR {
88        match self.bits {
89            false => ESOFR::NotExpectedStartOfFrame,
90            true => ESOFR::ExpectedStartOfFrame,
91        }
92    }
93    ///NotExpectedStartOfFrame
94    #[inline(always)]
95    pub fn is_not_expected_start_of_frame(&self) -> bool {
96        *self == ESOFR::NotExpectedStartOfFrame
97    }
98    ///an SOF packet is expected but not received
99    #[inline(always)]
100    pub fn is_expected_start_of_frame(&self) -> bool {
101        *self == ESOFR::ExpectedStartOfFrame
102    }
103}
104/**Expected start frame
105
106Value on reset: 0*/
107#[cfg_attr(feature = "defmt", derive(defmt::Format))]
108#[derive(Clone, Copy, Debug, PartialEq, Eq)]
109pub enum ESOFW {
110    ///0: Clear flag
111    Clear = 0,
112}
113impl From<ESOFW> for bool {
114    #[inline(always)]
115    fn from(variant: ESOFW) -> Self {
116        variant as u8 != 0
117    }
118}
119///Field `ESOF` writer - Expected start frame
120pub type ESOF_W<'a, REG> = crate::BitWriter0C<'a, REG, ESOFW>;
121impl<'a, REG> ESOF_W<'a, REG>
122where
123    REG: crate::Writable + crate::RegisterSpec,
124{
125    ///Clear flag
126    #[inline(always)]
127    pub fn clear(self) -> &'a mut crate::W<REG> {
128        self.variant(ESOFW::Clear)
129    }
130}
131/**start of frame
132
133Value on reset: 0*/
134#[cfg_attr(feature = "defmt", derive(defmt::Format))]
135#[derive(Clone, Copy, Debug, PartialEq, Eq)]
136pub enum SOFR {
137    ///0: NotStartOfFrame
138    NotStartOfFrame = 0,
139    ///1: beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus
140    StartOfFrame = 1,
141}
142impl From<SOFR> for bool {
143    #[inline(always)]
144    fn from(variant: SOFR) -> Self {
145        variant as u8 != 0
146    }
147}
148///Field `SOF` reader - start of frame
149pub type SOF_R = crate::BitReader<SOFR>;
150impl SOF_R {
151    ///Get enumerated values variant
152    #[inline(always)]
153    pub const fn variant(&self) -> SOFR {
154        match self.bits {
155            false => SOFR::NotStartOfFrame,
156            true => SOFR::StartOfFrame,
157        }
158    }
159    ///NotStartOfFrame
160    #[inline(always)]
161    pub fn is_not_start_of_frame(&self) -> bool {
162        *self == SOFR::NotStartOfFrame
163    }
164    ///beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus
165    #[inline(always)]
166    pub fn is_start_of_frame(&self) -> bool {
167        *self == SOFR::StartOfFrame
168    }
169}
170/**start of frame
171
172Value on reset: 0*/
173#[cfg_attr(feature = "defmt", derive(defmt::Format))]
174#[derive(Clone, Copy, Debug, PartialEq, Eq)]
175pub enum SOFW {
176    ///0: Clear flag
177    Clear = 0,
178}
179impl From<SOFW> for bool {
180    #[inline(always)]
181    fn from(variant: SOFW) -> Self {
182        variant as u8 != 0
183    }
184}
185///Field `SOF` writer - start of frame
186pub type SOF_W<'a, REG> = crate::BitWriter0C<'a, REG, SOFW>;
187impl<'a, REG> SOF_W<'a, REG>
188where
189    REG: crate::Writable + crate::RegisterSpec,
190{
191    ///Clear flag
192    #[inline(always)]
193    pub fn clear(self) -> &'a mut crate::W<REG> {
194        self.variant(SOFW::Clear)
195    }
196}
197/**reset request
198
199Value on reset: 0*/
200#[cfg_attr(feature = "defmt", derive(defmt::Format))]
201#[derive(Clone, Copy, Debug, PartialEq, Eq)]
202pub enum RESETR {
203    ///0: NotReset
204    NotReset = 0,
205    ///1: peripheral detects an active USB RESET signal at its inputs
206    Reset = 1,
207}
208impl From<RESETR> for bool {
209    #[inline(always)]
210    fn from(variant: RESETR) -> Self {
211        variant as u8 != 0
212    }
213}
214///Field `RESET` reader - reset request
215pub type RESET_R = crate::BitReader<RESETR>;
216impl RESET_R {
217    ///Get enumerated values variant
218    #[inline(always)]
219    pub const fn variant(&self) -> RESETR {
220        match self.bits {
221            false => RESETR::NotReset,
222            true => RESETR::Reset,
223        }
224    }
225    ///NotReset
226    #[inline(always)]
227    pub fn is_not_reset(&self) -> bool {
228        *self == RESETR::NotReset
229    }
230    ///peripheral detects an active USB RESET signal at its inputs
231    #[inline(always)]
232    pub fn is_reset(&self) -> bool {
233        *self == RESETR::Reset
234    }
235}
236/**reset request
237
238Value on reset: 0*/
239#[cfg_attr(feature = "defmt", derive(defmt::Format))]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum RESETW {
242    ///0: Clear flag
243    Clear = 0,
244}
245impl From<RESETW> for bool {
246    #[inline(always)]
247    fn from(variant: RESETW) -> Self {
248        variant as u8 != 0
249    }
250}
251///Field `RESET` writer - reset request
252pub type RESET_W<'a, REG> = crate::BitWriter0C<'a, REG, RESETW>;
253impl<'a, REG> RESET_W<'a, REG>
254where
255    REG: crate::Writable + crate::RegisterSpec,
256{
257    ///Clear flag
258    #[inline(always)]
259    pub fn clear(self) -> &'a mut crate::W<REG> {
260        self.variant(RESETW::Clear)
261    }
262}
263/**Suspend mode request
264
265Value on reset: 0*/
266#[cfg_attr(feature = "defmt", derive(defmt::Format))]
267#[derive(Clone, Copy, Debug, PartialEq, Eq)]
268pub enum SUSPR {
269    ///0: NotSuspend
270    NotSuspend = 0,
271    ///1: no traffic has been received for 3 ms, indicating a suspend mode request from the USB bus
272    Suspend = 1,
273}
274impl From<SUSPR> for bool {
275    #[inline(always)]
276    fn from(variant: SUSPR) -> Self {
277        variant as u8 != 0
278    }
279}
280///Field `SUSP` reader - Suspend mode request
281pub type SUSP_R = crate::BitReader<SUSPR>;
282impl SUSP_R {
283    ///Get enumerated values variant
284    #[inline(always)]
285    pub const fn variant(&self) -> SUSPR {
286        match self.bits {
287            false => SUSPR::NotSuspend,
288            true => SUSPR::Suspend,
289        }
290    }
291    ///NotSuspend
292    #[inline(always)]
293    pub fn is_not_suspend(&self) -> bool {
294        *self == SUSPR::NotSuspend
295    }
296    ///no traffic has been received for 3 ms, indicating a suspend mode request from the USB bus
297    #[inline(always)]
298    pub fn is_suspend(&self) -> bool {
299        *self == SUSPR::Suspend
300    }
301}
302/**Suspend mode request
303
304Value on reset: 0*/
305#[cfg_attr(feature = "defmt", derive(defmt::Format))]
306#[derive(Clone, Copy, Debug, PartialEq, Eq)]
307pub enum SUSPW {
308    ///0: Clear flag
309    Clear = 0,
310}
311impl From<SUSPW> for bool {
312    #[inline(always)]
313    fn from(variant: SUSPW) -> Self {
314        variant as u8 != 0
315    }
316}
317///Field `SUSP` writer - Suspend mode request
318pub type SUSP_W<'a, REG> = crate::BitWriter0C<'a, REG, SUSPW>;
319impl<'a, REG> SUSP_W<'a, REG>
320where
321    REG: crate::Writable + crate::RegisterSpec,
322{
323    ///Clear flag
324    #[inline(always)]
325    pub fn clear(self) -> &'a mut crate::W<REG> {
326        self.variant(SUSPW::Clear)
327    }
328}
329/**Wakeup
330
331Value on reset: 0*/
332#[cfg_attr(feature = "defmt", derive(defmt::Format))]
333#[derive(Clone, Copy, Debug, PartialEq, Eq)]
334pub enum WKUPR {
335    ///0: NotWakeup
336    NotWakeup = 0,
337    ///1: activity is detected that wakes up the USB peripheral
338    Wakeup = 1,
339}
340impl From<WKUPR> for bool {
341    #[inline(always)]
342    fn from(variant: WKUPR) -> Self {
343        variant as u8 != 0
344    }
345}
346///Field `WKUP` reader - Wakeup
347pub type WKUP_R = crate::BitReader<WKUPR>;
348impl WKUP_R {
349    ///Get enumerated values variant
350    #[inline(always)]
351    pub const fn variant(&self) -> WKUPR {
352        match self.bits {
353            false => WKUPR::NotWakeup,
354            true => WKUPR::Wakeup,
355        }
356    }
357    ///NotWakeup
358    #[inline(always)]
359    pub fn is_not_wakeup(&self) -> bool {
360        *self == WKUPR::NotWakeup
361    }
362    ///activity is detected that wakes up the USB peripheral
363    #[inline(always)]
364    pub fn is_wakeup(&self) -> bool {
365        *self == WKUPR::Wakeup
366    }
367}
368/**Wakeup
369
370Value on reset: 0*/
371#[cfg_attr(feature = "defmt", derive(defmt::Format))]
372#[derive(Clone, Copy, Debug, PartialEq, Eq)]
373pub enum WKUPW {
374    ///0: Clear flag
375    Clear = 0,
376}
377impl From<WKUPW> for bool {
378    #[inline(always)]
379    fn from(variant: WKUPW) -> Self {
380        variant as u8 != 0
381    }
382}
383///Field `WKUP` writer - Wakeup
384pub type WKUP_W<'a, REG> = crate::BitWriter0C<'a, REG, WKUPW>;
385impl<'a, REG> WKUP_W<'a, REG>
386where
387    REG: crate::Writable + crate::RegisterSpec,
388{
389    ///Clear flag
390    #[inline(always)]
391    pub fn clear(self) -> &'a mut crate::W<REG> {
392        self.variant(WKUPW::Clear)
393    }
394}
395/**Error
396
397Value on reset: 0*/
398#[cfg_attr(feature = "defmt", derive(defmt::Format))]
399#[derive(Clone, Copy, Debug, PartialEq, Eq)]
400pub enum ERRR {
401    ///0: Errors are not occurred
402    NotOverrun = 0,
403    ///1: One of No ANSwer, Cyclic Redundancy Check, Bit Stuffing or Framing format Violation error occurred
404    Error = 1,
405}
406impl From<ERRR> for bool {
407    #[inline(always)]
408    fn from(variant: ERRR) -> Self {
409        variant as u8 != 0
410    }
411}
412///Field `ERR` reader - Error
413pub type ERR_R = crate::BitReader<ERRR>;
414impl ERR_R {
415    ///Get enumerated values variant
416    #[inline(always)]
417    pub const fn variant(&self) -> ERRR {
418        match self.bits {
419            false => ERRR::NotOverrun,
420            true => ERRR::Error,
421        }
422    }
423    ///Errors are not occurred
424    #[inline(always)]
425    pub fn is_not_overrun(&self) -> bool {
426        *self == ERRR::NotOverrun
427    }
428    ///One of No ANSwer, Cyclic Redundancy Check, Bit Stuffing or Framing format Violation error occurred
429    #[inline(always)]
430    pub fn is_error(&self) -> bool {
431        *self == ERRR::Error
432    }
433}
434/**Error
435
436Value on reset: 0*/
437#[cfg_attr(feature = "defmt", derive(defmt::Format))]
438#[derive(Clone, Copy, Debug, PartialEq, Eq)]
439pub enum ERRW {
440    ///0: Clear flag
441    Clear = 0,
442}
443impl From<ERRW> for bool {
444    #[inline(always)]
445    fn from(variant: ERRW) -> Self {
446        variant as u8 != 0
447    }
448}
449///Field `ERR` writer - Error
450pub type ERR_W<'a, REG> = crate::BitWriter0C<'a, REG, ERRW>;
451impl<'a, REG> ERR_W<'a, REG>
452where
453    REG: crate::Writable + crate::RegisterSpec,
454{
455    ///Clear flag
456    #[inline(always)]
457    pub fn clear(self) -> &'a mut crate::W<REG> {
458        self.variant(ERRW::Clear)
459    }
460}
461/**Packet memory area over / underrun
462
463Value on reset: 0*/
464#[cfg_attr(feature = "defmt", derive(defmt::Format))]
465#[derive(Clone, Copy, Debug, PartialEq, Eq)]
466pub enum PMAOVRR {
467    ///0: Overrun is not occurred
468    NotOverrun = 0,
469    ///1: microcontroller has not been able to respond in time to an USB memory request
470    Overrun = 1,
471}
472impl From<PMAOVRR> for bool {
473    #[inline(always)]
474    fn from(variant: PMAOVRR) -> Self {
475        variant as u8 != 0
476    }
477}
478///Field `PMAOVR` reader - Packet memory area over / underrun
479pub type PMAOVR_R = crate::BitReader<PMAOVRR>;
480impl PMAOVR_R {
481    ///Get enumerated values variant
482    #[inline(always)]
483    pub const fn variant(&self) -> PMAOVRR {
484        match self.bits {
485            false => PMAOVRR::NotOverrun,
486            true => PMAOVRR::Overrun,
487        }
488    }
489    ///Overrun is not occurred
490    #[inline(always)]
491    pub fn is_not_overrun(&self) -> bool {
492        *self == PMAOVRR::NotOverrun
493    }
494    ///microcontroller has not been able to respond in time to an USB memory request
495    #[inline(always)]
496    pub fn is_overrun(&self) -> bool {
497        *self == PMAOVRR::Overrun
498    }
499}
500/**Packet memory area over / underrun
501
502Value on reset: 0*/
503#[cfg_attr(feature = "defmt", derive(defmt::Format))]
504#[derive(Clone, Copy, Debug, PartialEq, Eq)]
505pub enum PMAOVRW {
506    ///0: Clear flag
507    Clear = 0,
508}
509impl From<PMAOVRW> for bool {
510    #[inline(always)]
511    fn from(variant: PMAOVRW) -> Self {
512        variant as u8 != 0
513    }
514}
515///Field `PMAOVR` writer - Packet memory area over / underrun
516pub type PMAOVR_W<'a, REG> = crate::BitWriter0C<'a, REG, PMAOVRW>;
517impl<'a, REG> PMAOVR_W<'a, REG>
518where
519    REG: crate::Writable + crate::RegisterSpec,
520{
521    ///Clear flag
522    #[inline(always)]
523    pub fn clear(self) -> &'a mut crate::W<REG> {
524        self.variant(PMAOVRW::Clear)
525    }
526}
527/**Correct transfer
528
529Value on reset: 0*/
530#[cfg_attr(feature = "defmt", derive(defmt::Format))]
531#[derive(Clone, Copy, Debug, PartialEq, Eq)]
532pub enum CTR {
533    ///1: endpoint has successfully completed a transaction
534    Completed = 1,
535}
536impl From<CTR> for bool {
537    #[inline(always)]
538    fn from(variant: CTR) -> Self {
539        variant as u8 != 0
540    }
541}
542///Field `CTR` reader - Correct transfer
543pub type CTR_R = crate::BitReader<CTR>;
544impl CTR_R {
545    ///Get enumerated values variant
546    #[inline(always)]
547    pub const fn variant(&self) -> Option<CTR> {
548        match self.bits {
549            true => Some(CTR::Completed),
550            _ => None,
551        }
552    }
553    ///endpoint has successfully completed a transaction
554    #[inline(always)]
555    pub fn is_completed(&self) -> bool {
556        *self == CTR::Completed
557    }
558}
559///Field `CTR` writer - Correct transfer
560pub type CTR_W<'a, REG> = crate::BitWriter<'a, REG, CTR>;
561impl<'a, REG> CTR_W<'a, REG>
562where
563    REG: crate::Writable + crate::RegisterSpec,
564{
565    ///endpoint has successfully completed a transaction
566    #[inline(always)]
567    pub fn completed(self) -> &'a mut crate::W<REG> {
568        self.variant(CTR::Completed)
569    }
570}
571impl R {
572    ///Bits 0:3 - Endpoint Identifier
573    #[inline(always)]
574    pub fn ep_id(&self) -> EP_ID_R {
575        EP_ID_R::new((self.bits & 0x0f) as u8)
576    }
577    ///Bit 4 - Direction of transaction
578    #[inline(always)]
579    pub fn dir(&self) -> DIR_R {
580        DIR_R::new(((self.bits >> 4) & 1) != 0)
581    }
582    ///Bit 8 - Expected start frame
583    #[inline(always)]
584    pub fn esof(&self) -> ESOF_R {
585        ESOF_R::new(((self.bits >> 8) & 1) != 0)
586    }
587    ///Bit 9 - start of frame
588    #[inline(always)]
589    pub fn sof(&self) -> SOF_R {
590        SOF_R::new(((self.bits >> 9) & 1) != 0)
591    }
592    ///Bit 10 - reset request
593    #[inline(always)]
594    pub fn reset(&self) -> RESET_R {
595        RESET_R::new(((self.bits >> 10) & 1) != 0)
596    }
597    ///Bit 11 - Suspend mode request
598    #[inline(always)]
599    pub fn susp(&self) -> SUSP_R {
600        SUSP_R::new(((self.bits >> 11) & 1) != 0)
601    }
602    ///Bit 12 - Wakeup
603    #[inline(always)]
604    pub fn wkup(&self) -> WKUP_R {
605        WKUP_R::new(((self.bits >> 12) & 1) != 0)
606    }
607    ///Bit 13 - Error
608    #[inline(always)]
609    pub fn err(&self) -> ERR_R {
610        ERR_R::new(((self.bits >> 13) & 1) != 0)
611    }
612    ///Bit 14 - Packet memory area over / underrun
613    #[inline(always)]
614    pub fn pmaovr(&self) -> PMAOVR_R {
615        PMAOVR_R::new(((self.bits >> 14) & 1) != 0)
616    }
617    ///Bit 15 - Correct transfer
618    #[inline(always)]
619    pub fn ctr(&self) -> CTR_R {
620        CTR_R::new(((self.bits >> 15) & 1) != 0)
621    }
622}
623impl core::fmt::Debug for R {
624    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
625        f.debug_struct("ISTR")
626            .field("ep_id", &self.ep_id())
627            .field("dir", &self.dir())
628            .field("esof", &self.esof())
629            .field("sof", &self.sof())
630            .field("reset", &self.reset())
631            .field("susp", &self.susp())
632            .field("wkup", &self.wkup())
633            .field("err", &self.err())
634            .field("pmaovr", &self.pmaovr())
635            .field("ctr", &self.ctr())
636            .finish()
637    }
638}
639impl W {
640    ///Bits 0:3 - Endpoint Identifier
641    #[inline(always)]
642    pub fn ep_id(&mut self) -> EP_ID_W<ISTRrs> {
643        EP_ID_W::new(self, 0)
644    }
645    ///Bit 4 - Direction of transaction
646    #[inline(always)]
647    pub fn dir(&mut self) -> DIR_W<ISTRrs> {
648        DIR_W::new(self, 4)
649    }
650    ///Bit 8 - Expected start frame
651    #[inline(always)]
652    pub fn esof(&mut self) -> ESOF_W<ISTRrs> {
653        ESOF_W::new(self, 8)
654    }
655    ///Bit 9 - start of frame
656    #[inline(always)]
657    pub fn sof(&mut self) -> SOF_W<ISTRrs> {
658        SOF_W::new(self, 9)
659    }
660    ///Bit 10 - reset request
661    #[inline(always)]
662    pub fn reset(&mut self) -> RESET_W<ISTRrs> {
663        RESET_W::new(self, 10)
664    }
665    ///Bit 11 - Suspend mode request
666    #[inline(always)]
667    pub fn susp(&mut self) -> SUSP_W<ISTRrs> {
668        SUSP_W::new(self, 11)
669    }
670    ///Bit 12 - Wakeup
671    #[inline(always)]
672    pub fn wkup(&mut self) -> WKUP_W<ISTRrs> {
673        WKUP_W::new(self, 12)
674    }
675    ///Bit 13 - Error
676    #[inline(always)]
677    pub fn err(&mut self) -> ERR_W<ISTRrs> {
678        ERR_W::new(self, 13)
679    }
680    ///Bit 14 - Packet memory area over / underrun
681    #[inline(always)]
682    pub fn pmaovr(&mut self) -> PMAOVR_W<ISTRrs> {
683        PMAOVR_W::new(self, 14)
684    }
685    ///Bit 15 - Correct transfer
686    #[inline(always)]
687    pub fn ctr(&mut self) -> CTR_W<ISTRrs> {
688        CTR_W::new(self, 15)
689    }
690}
691/**interrupt status register
692
693You can [`read`](crate::Reg::read) this register and get [`istr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`istr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
694
695See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F103.html#USB:ISTR)*/
696pub struct ISTRrs;
697impl crate::RegisterSpec for ISTRrs {
698    type Ux = u32;
699}
700///`read()` method returns [`istr::R`](R) reader structure
701impl crate::Readable for ISTRrs {}
702///`write(|w| ..)` method takes [`istr::W`](W) writer structure
703impl crate::Writable for ISTRrs {
704    type Safety = crate::Unsafe;
705    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0x7f00;
706}
707///`reset()` method sets ISTR to value 0
708impl crate::Resettable for ISTRrs {}
stm32f1_staging/stm32f103/usb/istr.rs

stm32f1_staging/stm32f103/usb/
istr.rs
