stm32f1_staging/stm32f102/
spi2.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr1: CR1,
6    _reserved1: [u8; 0x02],
7    cr2: CR2,
8    _reserved2: [u8; 0x02],
9    sr: SR,
10    _reserved3: [u8; 0x02],
11    _reserved_3_dr: [u8; 0x02],
12    _reserved4: [u8; 0x02],
13    crcpr: CRCPR,
14    _reserved5: [u8; 0x02],
15    rxcrcr: RXCRCR,
16    _reserved6: [u8; 0x02],
17    txcrcr: TXCRCR,
18}
19impl RegisterBlock {
20    ///0x00 - control register 1
21    #[inline(always)]
22    pub const fn cr1(&self) -> &CR1 {
23        &self.cr1
24    }
25    ///0x04 - control register 2
26    #[inline(always)]
27    pub const fn cr2(&self) -> &CR2 {
28        &self.cr2
29    }
30    ///0x08 - status register
31    #[inline(always)]
32    pub const fn sr(&self) -> &SR {
33        &self.sr
34    }
35    ///0x0c - Direct 8-bit access to data register
36    #[inline(always)]
37    pub const fn dr8(&self) -> &DR8 {
38        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).cast() }
39    }
40    ///0x0c - data register
41    #[inline(always)]
42    pub const fn dr(&self) -> &DR {
43        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).cast() }
44    }
45    ///0x10 - CRC polynomial register
46    #[inline(always)]
47    pub const fn crcpr(&self) -> &CRCPR {
48        &self.crcpr
49    }
50    ///0x14 - RX CRC register
51    #[inline(always)]
52    pub const fn rxcrcr(&self) -> &RXCRCR {
53        &self.rxcrcr
54    }
55    ///0x18 - TX CRC register
56    #[inline(always)]
57    pub const fn txcrcr(&self) -> &TXCRCR {
58        &self.txcrcr
59    }
60}
61/**CR1 (rw) register accessor: control register 1
62
63You can [`read`](crate::Reg::read) this register and get [`cr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
64
65See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:CR1)
66
67For information about available fields see [`mod@cr1`] module*/
68pub type CR1 = crate::Reg<cr1::CR1rs>;
69///control register 1
70pub mod cr1;
71/**CR2 (rw) register accessor: control register 2
72
73You can [`read`](crate::Reg::read) this register and get [`cr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
74
75See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:CR2)
76
77For information about available fields see [`mod@cr2`] module*/
78pub type CR2 = crate::Reg<cr2::CR2rs>;
79///control register 2
80pub mod cr2;
81/**SR (rw) register accessor: status register
82
83You can [`read`](crate::Reg::read) this register and get [`sr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
84
85See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:SR)
86
87For information about available fields see [`mod@sr`] module*/
88pub type SR = crate::Reg<sr::SRrs>;
89///status register
90pub mod sr;
91/**DR (rw) register accessor: data register
92
93You can [`read`](crate::Reg::read) this register and get [`dr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
94
95See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:DR)
96
97For information about available fields see [`mod@dr`] module*/
98pub type DR = crate::Reg<dr::DRrs>;
99///data register
100pub mod dr;
101/**DR8 (rw) register accessor: Direct 8-bit access to data register
102
103You can [`read`](crate::Reg::read) this register and get [`dr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
104
105See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:DR8)
106
107For information about available fields see [`mod@dr8`] module*/
108pub type DR8 = crate::Reg<dr8::DR8rs>;
109///Direct 8-bit access to data register
110pub mod dr8;
111/**CRCPR (rw) register accessor: CRC polynomial register
112
113You can [`read`](crate::Reg::read) this register and get [`crcpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
114
115See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:CRCPR)
116
117For information about available fields see [`mod@crcpr`] module*/
118pub type CRCPR = crate::Reg<crcpr::CRCPRrs>;
119///CRC polynomial register
120pub mod crcpr;
121/**RXCRCR (r) register accessor: RX CRC register
122
123You can [`read`](crate::Reg::read) this register and get [`rxcrcr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
124
125See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:RXCRCR)
126
127For information about available fields see [`mod@rxcrcr`] module*/
128pub type RXCRCR = crate::Reg<rxcrcr::RXCRCRrs>;
129///RX CRC register
130pub mod rxcrcr;
131/**TXCRCR (r) register accessor: TX CRC register
132
133You can [`read`](crate::Reg::read) this register and get [`txcrcr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
134
135See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#SPI2:TXCRCR)
136
137For information about available fields see [`mod@txcrcr`] module*/
138pub type TXCRCR = crate::Reg<txcrcr::TXCRCRrs>;
139///TX CRC register
140pub mod txcrcr;
stm32f1_staging/stm32f102/spi2.rs

stm32f1_staging/stm32f102/
spi2.rs
