stm32f1_staging/stm32f102/iwdg/
rlr.rs

1///Register `RLR` reader
2pub type R = crate::R<RLRrs>;
3///Register `RLR` writer
4pub type W = crate::W<RLRrs>;
5///Field `RL` reader - Watchdog counter reload value
6pub type RL_R = crate::FieldReader<u16>;
7///Field `RL` writer - Watchdog counter reload value
8pub type RL_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16, crate::Safe>;
9impl R {
10    ///Bits 0:11 - Watchdog counter reload value
11    #[inline(always)]
12    pub fn rl(&self) -> RL_R {
13        RL_R::new(self.bits & 0x0fff)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("RLR").field("rl", &self.rl()).finish()
19    }
20}
21impl W {
22    ///Bits 0:11 - Watchdog counter reload value
23    #[inline(always)]
24    pub fn rl(&mut self) -> RL_W<RLRrs> {
25        RL_W::new(self, 0)
26    }
27}
28/**Reload register (IWDG_RLR)
29
30You can [`read`](crate::Reg::read) this register and get [`rlr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rlr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
31
32See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#IWDG:RLR)*/
33pub struct RLRrs;
34impl crate::RegisterSpec for RLRrs {
35    type Ux = u16;
36}
37///`read()` method returns [`rlr::R`](R) reader structure
38impl crate::Readable for RLRrs {}
39///`write(|w| ..)` method takes [`rlr::W`](W) writer structure
40impl crate::Writable for RLRrs {
41    type Safety = crate::Unsafe;
42}
43///`reset()` method sets RLR to value 0x0fff
44impl crate::Resettable for RLRrs {
45    const RESET_VALUE: u16 = 0x0fff;
46}
stm32f1_staging/stm32f102/iwdg/rlr.rs

stm32f1_staging/stm32f102/iwdg/
rlr.rs
