stm32f1_staging/stm32f102/dac/
dhr12r1.rs

1///Register `DHR12R1` reader
2pub type R = crate::R<DHR12R1rs>;
3///Register `DHR12R1` writer
4pub type W = crate::W<DHR12R1rs>;
5///Field `DACC1DHR` reader - DAC channel1 12-bit right-aligned data
6pub type DACC1DHR_R = crate::FieldReader<u16>;
7///Field `DACC1DHR` writer - DAC channel1 12-bit right-aligned data
8pub type DACC1DHR_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16, crate::Safe>;
9impl R {
10    ///Bits 0:11 - DAC channel1 12-bit right-aligned data
11    #[inline(always)]
12    pub fn dacc1dhr(&self) -> DACC1DHR_R {
13        DACC1DHR_R::new((self.bits & 0x0fff) as u16)
14    }
15}
16impl core::fmt::Debug for R {
17    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
18        f.debug_struct("DHR12R1").field("dacc1dhr", &self.dacc1dhr()).finish()
19    }
20}
21impl W {
22    ///Bits 0:11 - DAC channel1 12-bit right-aligned data
23    #[inline(always)]
24    pub fn dacc1dhr(&mut self) -> DACC1DHR_W<DHR12R1rs> {
25        DACC1DHR_W::new(self, 0)
26    }
27}
28/**DAC channel1 12-bit right-aligned data holding register(DAC_DHR12R1)
29
30You can [`read`](crate::Reg::read) this register and get [`dhr12r1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dhr12r1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
31
32See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#DAC:DHR12R1)*/
33pub struct DHR12R1rs;
34impl crate::RegisterSpec for DHR12R1rs {
35    type Ux = u32;
36}
37///`read()` method returns [`dhr12r1::R`](R) reader structure
38impl crate::Readable for DHR12R1rs {}
39///`write(|w| ..)` method takes [`dhr12r1::W`](W) writer structure
40impl crate::Writable for DHR12R1rs {
41    type Safety = crate::Unsafe;
42}
43///`reset()` method sets DHR12R1 to value 0
44impl crate::Resettable for DHR12R1rs {}
stm32f1_staging/stm32f102/dac/dhr12r1.rs

stm32f1_staging/stm32f102/dac/
dhr12r1.rs
