stm32f1_staging/stm32f102/i2c1/
cr1.rs

1///Register `CR1` reader
2pub type R = crate::R<CR1rs>;
3///Register `CR1` writer
4pub type W = crate::W<CR1rs>;
5/**Peripheral enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum PE {
11    ///0: Peripheral disabled
12    Disabled = 0,
13    ///1: Peripheral enabled
14    Enabled = 1,
15}
16impl From<PE> for bool {
17    #[inline(always)]
18    fn from(variant: PE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `PE` reader - Peripheral enable
23pub type PE_R = crate::BitReader<PE>;
24impl PE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> PE {
28        match self.bits {
29            false => PE::Disabled,
30            true => PE::Enabled,
31        }
32    }
33    ///Peripheral disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == PE::Disabled
37    }
38    ///Peripheral enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == PE::Enabled
42    }
43}
44///Field `PE` writer - Peripheral enable
45pub type PE_W<'a, REG> = crate::BitWriter<'a, REG, PE>;
46impl<'a, REG> PE_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Peripheral disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(PE::Disabled)
54    }
55    ///Peripheral enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(PE::Enabled)
59    }
60}
61/**SMBus mode
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum SMBUS {
67    ///0: I2C Mode
68    I2c = 0,
69    ///1: SMBus
70    Smbus = 1,
71}
72impl From<SMBUS> for bool {
73    #[inline(always)]
74    fn from(variant: SMBUS) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `SMBUS` reader - SMBus mode
79pub type SMBUS_R = crate::BitReader<SMBUS>;
80impl SMBUS_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> SMBUS {
84        match self.bits {
85            false => SMBUS::I2c,
86            true => SMBUS::Smbus,
87        }
88    }
89    ///I2C Mode
90    #[inline(always)]
91    pub fn is_i2c(&self) -> bool {
92        *self == SMBUS::I2c
93    }
94    ///SMBus
95    #[inline(always)]
96    pub fn is_smbus(&self) -> bool {
97        *self == SMBUS::Smbus
98    }
99}
100///Field `SMBUS` writer - SMBus mode
101pub type SMBUS_W<'a, REG> = crate::BitWriter<'a, REG, SMBUS>;
102impl<'a, REG> SMBUS_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///I2C Mode
107    #[inline(always)]
108    pub fn i2c(self) -> &'a mut crate::W<REG> {
109        self.variant(SMBUS::I2c)
110    }
111    ///SMBus
112    #[inline(always)]
113    pub fn smbus(self) -> &'a mut crate::W<REG> {
114        self.variant(SMBUS::Smbus)
115    }
116}
117/**SMBus type
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum SMBTYPE {
123    ///0: SMBus Device
124    Device = 0,
125    ///1: SMBus Host
126    Host = 1,
127}
128impl From<SMBTYPE> for bool {
129    #[inline(always)]
130    fn from(variant: SMBTYPE) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `SMBTYPE` reader - SMBus type
135pub type SMBTYPE_R = crate::BitReader<SMBTYPE>;
136impl SMBTYPE_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> SMBTYPE {
140        match self.bits {
141            false => SMBTYPE::Device,
142            true => SMBTYPE::Host,
143        }
144    }
145    ///SMBus Device
146    #[inline(always)]
147    pub fn is_device(&self) -> bool {
148        *self == SMBTYPE::Device
149    }
150    ///SMBus Host
151    #[inline(always)]
152    pub fn is_host(&self) -> bool {
153        *self == SMBTYPE::Host
154    }
155}
156///Field `SMBTYPE` writer - SMBus type
157pub type SMBTYPE_W<'a, REG> = crate::BitWriter<'a, REG, SMBTYPE>;
158impl<'a, REG> SMBTYPE_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///SMBus Device
163    #[inline(always)]
164    pub fn device(self) -> &'a mut crate::W<REG> {
165        self.variant(SMBTYPE::Device)
166    }
167    ///SMBus Host
168    #[inline(always)]
169    pub fn host(self) -> &'a mut crate::W<REG> {
170        self.variant(SMBTYPE::Host)
171    }
172}
173/**ARP enable
174
175Value on reset: 0*/
176#[cfg_attr(feature = "defmt", derive(defmt::Format))]
177#[derive(Clone, Copy, Debug, PartialEq, Eq)]
178pub enum ENARP {
179    ///0: ARP disabled
180    Disabled = 0,
181    ///1: ARP enabled
182    Enabled = 1,
183}
184impl From<ENARP> for bool {
185    #[inline(always)]
186    fn from(variant: ENARP) -> Self {
187        variant as u8 != 0
188    }
189}
190///Field `ENARP` reader - ARP enable
191pub type ENARP_R = crate::BitReader<ENARP>;
192impl ENARP_R {
193    ///Get enumerated values variant
194    #[inline(always)]
195    pub const fn variant(&self) -> ENARP {
196        match self.bits {
197            false => ENARP::Disabled,
198            true => ENARP::Enabled,
199        }
200    }
201    ///ARP disabled
202    #[inline(always)]
203    pub fn is_disabled(&self) -> bool {
204        *self == ENARP::Disabled
205    }
206    ///ARP enabled
207    #[inline(always)]
208    pub fn is_enabled(&self) -> bool {
209        *self == ENARP::Enabled
210    }
211}
212///Field `ENARP` writer - ARP enable
213pub type ENARP_W<'a, REG> = crate::BitWriter<'a, REG, ENARP>;
214impl<'a, REG> ENARP_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    ///ARP disabled
219    #[inline(always)]
220    pub fn disabled(self) -> &'a mut crate::W<REG> {
221        self.variant(ENARP::Disabled)
222    }
223    ///ARP enabled
224    #[inline(always)]
225    pub fn enabled(self) -> &'a mut crate::W<REG> {
226        self.variant(ENARP::Enabled)
227    }
228}
229/**PEC enable
230
231Value on reset: 0*/
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum ENPEC {
235    ///0: PEC calculation disabled
236    Disabled = 0,
237    ///1: PEC calculation enabled
238    Enabled = 1,
239}
240impl From<ENPEC> for bool {
241    #[inline(always)]
242    fn from(variant: ENPEC) -> Self {
243        variant as u8 != 0
244    }
245}
246///Field `ENPEC` reader - PEC enable
247pub type ENPEC_R = crate::BitReader<ENPEC>;
248impl ENPEC_R {
249    ///Get enumerated values variant
250    #[inline(always)]
251    pub const fn variant(&self) -> ENPEC {
252        match self.bits {
253            false => ENPEC::Disabled,
254            true => ENPEC::Enabled,
255        }
256    }
257    ///PEC calculation disabled
258    #[inline(always)]
259    pub fn is_disabled(&self) -> bool {
260        *self == ENPEC::Disabled
261    }
262    ///PEC calculation enabled
263    #[inline(always)]
264    pub fn is_enabled(&self) -> bool {
265        *self == ENPEC::Enabled
266    }
267}
268///Field `ENPEC` writer - PEC enable
269pub type ENPEC_W<'a, REG> = crate::BitWriter<'a, REG, ENPEC>;
270impl<'a, REG> ENPEC_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    ///PEC calculation disabled
275    #[inline(always)]
276    pub fn disabled(self) -> &'a mut crate::W<REG> {
277        self.variant(ENPEC::Disabled)
278    }
279    ///PEC calculation enabled
280    #[inline(always)]
281    pub fn enabled(self) -> &'a mut crate::W<REG> {
282        self.variant(ENPEC::Enabled)
283    }
284}
285/**General call enable
286
287Value on reset: 0*/
288#[cfg_attr(feature = "defmt", derive(defmt::Format))]
289#[derive(Clone, Copy, Debug, PartialEq, Eq)]
290pub enum ENGC {
291    ///0: General call disabled
292    Disabled = 0,
293    ///1: General call enabled
294    Enabled = 1,
295}
296impl From<ENGC> for bool {
297    #[inline(always)]
298    fn from(variant: ENGC) -> Self {
299        variant as u8 != 0
300    }
301}
302///Field `ENGC` reader - General call enable
303pub type ENGC_R = crate::BitReader<ENGC>;
304impl ENGC_R {
305    ///Get enumerated values variant
306    #[inline(always)]
307    pub const fn variant(&self) -> ENGC {
308        match self.bits {
309            false => ENGC::Disabled,
310            true => ENGC::Enabled,
311        }
312    }
313    ///General call disabled
314    #[inline(always)]
315    pub fn is_disabled(&self) -> bool {
316        *self == ENGC::Disabled
317    }
318    ///General call enabled
319    #[inline(always)]
320    pub fn is_enabled(&self) -> bool {
321        *self == ENGC::Enabled
322    }
323}
324///Field `ENGC` writer - General call enable
325pub type ENGC_W<'a, REG> = crate::BitWriter<'a, REG, ENGC>;
326impl<'a, REG> ENGC_W<'a, REG>
327where
328    REG: crate::Writable + crate::RegisterSpec,
329{
330    ///General call disabled
331    #[inline(always)]
332    pub fn disabled(self) -> &'a mut crate::W<REG> {
333        self.variant(ENGC::Disabled)
334    }
335    ///General call enabled
336    #[inline(always)]
337    pub fn enabled(self) -> &'a mut crate::W<REG> {
338        self.variant(ENGC::Enabled)
339    }
340}
341/**Clock stretching disable (Slave mode)
342
343Value on reset: 0*/
344#[cfg_attr(feature = "defmt", derive(defmt::Format))]
345#[derive(Clone, Copy, Debug, PartialEq, Eq)]
346pub enum NOSTRETCH {
347    ///0: Clock stretching enabled
348    Enabled = 0,
349    ///1: Clock stretching disabled
350    Disabled = 1,
351}
352impl From<NOSTRETCH> for bool {
353    #[inline(always)]
354    fn from(variant: NOSTRETCH) -> Self {
355        variant as u8 != 0
356    }
357}
358///Field `NOSTRETCH` reader - Clock stretching disable (Slave mode)
359pub type NOSTRETCH_R = crate::BitReader<NOSTRETCH>;
360impl NOSTRETCH_R {
361    ///Get enumerated values variant
362    #[inline(always)]
363    pub const fn variant(&self) -> NOSTRETCH {
364        match self.bits {
365            false => NOSTRETCH::Enabled,
366            true => NOSTRETCH::Disabled,
367        }
368    }
369    ///Clock stretching enabled
370    #[inline(always)]
371    pub fn is_enabled(&self) -> bool {
372        *self == NOSTRETCH::Enabled
373    }
374    ///Clock stretching disabled
375    #[inline(always)]
376    pub fn is_disabled(&self) -> bool {
377        *self == NOSTRETCH::Disabled
378    }
379}
380///Field `NOSTRETCH` writer - Clock stretching disable (Slave mode)
381pub type NOSTRETCH_W<'a, REG> = crate::BitWriter<'a, REG, NOSTRETCH>;
382impl<'a, REG> NOSTRETCH_W<'a, REG>
383where
384    REG: crate::Writable + crate::RegisterSpec,
385{
386    ///Clock stretching enabled
387    #[inline(always)]
388    pub fn enabled(self) -> &'a mut crate::W<REG> {
389        self.variant(NOSTRETCH::Enabled)
390    }
391    ///Clock stretching disabled
392    #[inline(always)]
393    pub fn disabled(self) -> &'a mut crate::W<REG> {
394        self.variant(NOSTRETCH::Disabled)
395    }
396}
397/**Start generation
398
399Value on reset: 0*/
400#[cfg_attr(feature = "defmt", derive(defmt::Format))]
401#[derive(Clone, Copy, Debug, PartialEq, Eq)]
402pub enum START {
403    ///0: No Start generation
404    NoStart = 0,
405    ///1: In master mode: repeated start generation, in slave mode: start generation when bus is free
406    Start = 1,
407}
408impl From<START> for bool {
409    #[inline(always)]
410    fn from(variant: START) -> Self {
411        variant as u8 != 0
412    }
413}
414///Field `START` reader - Start generation
415pub type START_R = crate::BitReader<START>;
416impl START_R {
417    ///Get enumerated values variant
418    #[inline(always)]
419    pub const fn variant(&self) -> START {
420        match self.bits {
421            false => START::NoStart,
422            true => START::Start,
423        }
424    }
425    ///No Start generation
426    #[inline(always)]
427    pub fn is_no_start(&self) -> bool {
428        *self == START::NoStart
429    }
430    ///In master mode: repeated start generation, in slave mode: start generation when bus is free
431    #[inline(always)]
432    pub fn is_start(&self) -> bool {
433        *self == START::Start
434    }
435}
436///Field `START` writer - Start generation
437pub type START_W<'a, REG> = crate::BitWriter<'a, REG, START>;
438impl<'a, REG> START_W<'a, REG>
439where
440    REG: crate::Writable + crate::RegisterSpec,
441{
442    ///No Start generation
443    #[inline(always)]
444    pub fn no_start(self) -> &'a mut crate::W<REG> {
445        self.variant(START::NoStart)
446    }
447    ///In master mode: repeated start generation, in slave mode: start generation when bus is free
448    #[inline(always)]
449    pub fn start(self) -> &'a mut crate::W<REG> {
450        self.variant(START::Start)
451    }
452}
453/**Stop generation
454
455Value on reset: 0*/
456#[cfg_attr(feature = "defmt", derive(defmt::Format))]
457#[derive(Clone, Copy, Debug, PartialEq, Eq)]
458pub enum STOP {
459    ///0: No Stop generation
460    NoStop = 0,
461    ///1: In master mode: stop generation after current byte/start, in slave mode: release SCL and SDA after current byte
462    Stop = 1,
463}
464impl From<STOP> for bool {
465    #[inline(always)]
466    fn from(variant: STOP) -> Self {
467        variant as u8 != 0
468    }
469}
470///Field `STOP` reader - Stop generation
471pub type STOP_R = crate::BitReader<STOP>;
472impl STOP_R {
473    ///Get enumerated values variant
474    #[inline(always)]
475    pub const fn variant(&self) -> STOP {
476        match self.bits {
477            false => STOP::NoStop,
478            true => STOP::Stop,
479        }
480    }
481    ///No Stop generation
482    #[inline(always)]
483    pub fn is_no_stop(&self) -> bool {
484        *self == STOP::NoStop
485    }
486    ///In master mode: stop generation after current byte/start, in slave mode: release SCL and SDA after current byte
487    #[inline(always)]
488    pub fn is_stop(&self) -> bool {
489        *self == STOP::Stop
490    }
491}
492///Field `STOP` writer - Stop generation
493pub type STOP_W<'a, REG> = crate::BitWriter<'a, REG, STOP>;
494impl<'a, REG> STOP_W<'a, REG>
495where
496    REG: crate::Writable + crate::RegisterSpec,
497{
498    ///No Stop generation
499    #[inline(always)]
500    pub fn no_stop(self) -> &'a mut crate::W<REG> {
501        self.variant(STOP::NoStop)
502    }
503    ///In master mode: stop generation after current byte/start, in slave mode: release SCL and SDA after current byte
504    #[inline(always)]
505    pub fn stop(self) -> &'a mut crate::W<REG> {
506        self.variant(STOP::Stop)
507    }
508}
509/**Acknowledge enable
510
511Value on reset: 0*/
512#[cfg_attr(feature = "defmt", derive(defmt::Format))]
513#[derive(Clone, Copy, Debug, PartialEq, Eq)]
514pub enum ACK {
515    ///0: No acknowledge returned
516    Nak = 0,
517    ///1: Acknowledge returned after a byte is received
518    Ack = 1,
519}
520impl From<ACK> for bool {
521    #[inline(always)]
522    fn from(variant: ACK) -> Self {
523        variant as u8 != 0
524    }
525}
526///Field `ACK` reader - Acknowledge enable
527pub type ACK_R = crate::BitReader<ACK>;
528impl ACK_R {
529    ///Get enumerated values variant
530    #[inline(always)]
531    pub const fn variant(&self) -> ACK {
532        match self.bits {
533            false => ACK::Nak,
534            true => ACK::Ack,
535        }
536    }
537    ///No acknowledge returned
538    #[inline(always)]
539    pub fn is_nak(&self) -> bool {
540        *self == ACK::Nak
541    }
542    ///Acknowledge returned after a byte is received
543    #[inline(always)]
544    pub fn is_ack(&self) -> bool {
545        *self == ACK::Ack
546    }
547}
548///Field `ACK` writer - Acknowledge enable
549pub type ACK_W<'a, REG> = crate::BitWriter<'a, REG, ACK>;
550impl<'a, REG> ACK_W<'a, REG>
551where
552    REG: crate::Writable + crate::RegisterSpec,
553{
554    ///No acknowledge returned
555    #[inline(always)]
556    pub fn nak(self) -> &'a mut crate::W<REG> {
557        self.variant(ACK::Nak)
558    }
559    ///Acknowledge returned after a byte is received
560    #[inline(always)]
561    pub fn ack(self) -> &'a mut crate::W<REG> {
562        self.variant(ACK::Ack)
563    }
564}
565/**Acknowledge/PEC Position (for data reception)
566
567Value on reset: 0*/
568#[cfg_attr(feature = "defmt", derive(defmt::Format))]
569#[derive(Clone, Copy, Debug, PartialEq, Eq)]
570pub enum POS {
571    ///0: ACK bit controls the (N)ACK of the current byte being received
572    Current = 0,
573    ///1: ACK bit controls the (N)ACK of the next byte to be received
574    Next = 1,
575}
576impl From<POS> for bool {
577    #[inline(always)]
578    fn from(variant: POS) -> Self {
579        variant as u8 != 0
580    }
581}
582///Field `POS` reader - Acknowledge/PEC Position (for data reception)
583pub type POS_R = crate::BitReader<POS>;
584impl POS_R {
585    ///Get enumerated values variant
586    #[inline(always)]
587    pub const fn variant(&self) -> POS {
588        match self.bits {
589            false => POS::Current,
590            true => POS::Next,
591        }
592    }
593    ///ACK bit controls the (N)ACK of the current byte being received
594    #[inline(always)]
595    pub fn is_current(&self) -> bool {
596        *self == POS::Current
597    }
598    ///ACK bit controls the (N)ACK of the next byte to be received
599    #[inline(always)]
600    pub fn is_next(&self) -> bool {
601        *self == POS::Next
602    }
603}
604///Field `POS` writer - Acknowledge/PEC Position (for data reception)
605pub type POS_W<'a, REG> = crate::BitWriter<'a, REG, POS>;
606impl<'a, REG> POS_W<'a, REG>
607where
608    REG: crate::Writable + crate::RegisterSpec,
609{
610    ///ACK bit controls the (N)ACK of the current byte being received
611    #[inline(always)]
612    pub fn current(self) -> &'a mut crate::W<REG> {
613        self.variant(POS::Current)
614    }
615    ///ACK bit controls the (N)ACK of the next byte to be received
616    #[inline(always)]
617    pub fn next(self) -> &'a mut crate::W<REG> {
618        self.variant(POS::Next)
619    }
620}
621/**Packet error checking
622
623Value on reset: 0*/
624#[cfg_attr(feature = "defmt", derive(defmt::Format))]
625#[derive(Clone, Copy, Debug, PartialEq, Eq)]
626pub enum PEC {
627    ///0: No PEC transfer
628    Disabled = 0,
629    ///1: PEC transfer
630    Enabled = 1,
631}
632impl From<PEC> for bool {
633    #[inline(always)]
634    fn from(variant: PEC) -> Self {
635        variant as u8 != 0
636    }
637}
638///Field `PEC` reader - Packet error checking
639pub type PEC_R = crate::BitReader<PEC>;
640impl PEC_R {
641    ///Get enumerated values variant
642    #[inline(always)]
643    pub const fn variant(&self) -> PEC {
644        match self.bits {
645            false => PEC::Disabled,
646            true => PEC::Enabled,
647        }
648    }
649    ///No PEC transfer
650    #[inline(always)]
651    pub fn is_disabled(&self) -> bool {
652        *self == PEC::Disabled
653    }
654    ///PEC transfer
655    #[inline(always)]
656    pub fn is_enabled(&self) -> bool {
657        *self == PEC::Enabled
658    }
659}
660///Field `PEC` writer - Packet error checking
661pub type PEC_W<'a, REG> = crate::BitWriter<'a, REG, PEC>;
662impl<'a, REG> PEC_W<'a, REG>
663where
664    REG: crate::Writable + crate::RegisterSpec,
665{
666    ///No PEC transfer
667    #[inline(always)]
668    pub fn disabled(self) -> &'a mut crate::W<REG> {
669        self.variant(PEC::Disabled)
670    }
671    ///PEC transfer
672    #[inline(always)]
673    pub fn enabled(self) -> &'a mut crate::W<REG> {
674        self.variant(PEC::Enabled)
675    }
676}
677/**SMBus alert
678
679Value on reset: 0*/
680#[cfg_attr(feature = "defmt", derive(defmt::Format))]
681#[derive(Clone, Copy, Debug, PartialEq, Eq)]
682pub enum ALERT {
683    ///0: SMBA pin released high
684    Release = 0,
685    ///1: SMBA pin driven low
686    Drive = 1,
687}
688impl From<ALERT> for bool {
689    #[inline(always)]
690    fn from(variant: ALERT) -> Self {
691        variant as u8 != 0
692    }
693}
694///Field `ALERT` reader - SMBus alert
695pub type ALERT_R = crate::BitReader<ALERT>;
696impl ALERT_R {
697    ///Get enumerated values variant
698    #[inline(always)]
699    pub const fn variant(&self) -> ALERT {
700        match self.bits {
701            false => ALERT::Release,
702            true => ALERT::Drive,
703        }
704    }
705    ///SMBA pin released high
706    #[inline(always)]
707    pub fn is_release(&self) -> bool {
708        *self == ALERT::Release
709    }
710    ///SMBA pin driven low
711    #[inline(always)]
712    pub fn is_drive(&self) -> bool {
713        *self == ALERT::Drive
714    }
715}
716///Field `ALERT` writer - SMBus alert
717pub type ALERT_W<'a, REG> = crate::BitWriter<'a, REG, ALERT>;
718impl<'a, REG> ALERT_W<'a, REG>
719where
720    REG: crate::Writable + crate::RegisterSpec,
721{
722    ///SMBA pin released high
723    #[inline(always)]
724    pub fn release(self) -> &'a mut crate::W<REG> {
725        self.variant(ALERT::Release)
726    }
727    ///SMBA pin driven low
728    #[inline(always)]
729    pub fn drive(self) -> &'a mut crate::W<REG> {
730        self.variant(ALERT::Drive)
731    }
732}
733/**Software reset
734
735Value on reset: 0*/
736#[cfg_attr(feature = "defmt", derive(defmt::Format))]
737#[derive(Clone, Copy, Debug, PartialEq, Eq)]
738pub enum SWRST {
739    ///0: I2C peripheral not under reset
740    NotReset = 0,
741    ///1: I2C peripheral under reset
742    Reset = 1,
743}
744impl From<SWRST> for bool {
745    #[inline(always)]
746    fn from(variant: SWRST) -> Self {
747        variant as u8 != 0
748    }
749}
750///Field `SWRST` reader - Software reset
751pub type SWRST_R = crate::BitReader<SWRST>;
752impl SWRST_R {
753    ///Get enumerated values variant
754    #[inline(always)]
755    pub const fn variant(&self) -> SWRST {
756        match self.bits {
757            false => SWRST::NotReset,
758            true => SWRST::Reset,
759        }
760    }
761    ///I2C peripheral not under reset
762    #[inline(always)]
763    pub fn is_not_reset(&self) -> bool {
764        *self == SWRST::NotReset
765    }
766    ///I2C peripheral under reset
767    #[inline(always)]
768    pub fn is_reset(&self) -> bool {
769        *self == SWRST::Reset
770    }
771}
772///Field `SWRST` writer - Software reset
773pub type SWRST_W<'a, REG> = crate::BitWriter<'a, REG, SWRST>;
774impl<'a, REG> SWRST_W<'a, REG>
775where
776    REG: crate::Writable + crate::RegisterSpec,
777{
778    ///I2C peripheral not under reset
779    #[inline(always)]
780    pub fn not_reset(self) -> &'a mut crate::W<REG> {
781        self.variant(SWRST::NotReset)
782    }
783    ///I2C peripheral under reset
784    #[inline(always)]
785    pub fn reset(self) -> &'a mut crate::W<REG> {
786        self.variant(SWRST::Reset)
787    }
788}
789impl R {
790    ///Bit 0 - Peripheral enable
791    #[inline(always)]
792    pub fn pe(&self) -> PE_R {
793        PE_R::new((self.bits & 1) != 0)
794    }
795    ///Bit 1 - SMBus mode
796    #[inline(always)]
797    pub fn smbus(&self) -> SMBUS_R {
798        SMBUS_R::new(((self.bits >> 1) & 1) != 0)
799    }
800    ///Bit 3 - SMBus type
801    #[inline(always)]
802    pub fn smbtype(&self) -> SMBTYPE_R {
803        SMBTYPE_R::new(((self.bits >> 3) & 1) != 0)
804    }
805    ///Bit 4 - ARP enable
806    #[inline(always)]
807    pub fn enarp(&self) -> ENARP_R {
808        ENARP_R::new(((self.bits >> 4) & 1) != 0)
809    }
810    ///Bit 5 - PEC enable
811    #[inline(always)]
812    pub fn enpec(&self) -> ENPEC_R {
813        ENPEC_R::new(((self.bits >> 5) & 1) != 0)
814    }
815    ///Bit 6 - General call enable
816    #[inline(always)]
817    pub fn engc(&self) -> ENGC_R {
818        ENGC_R::new(((self.bits >> 6) & 1) != 0)
819    }
820    ///Bit 7 - Clock stretching disable (Slave mode)
821    #[inline(always)]
822    pub fn nostretch(&self) -> NOSTRETCH_R {
823        NOSTRETCH_R::new(((self.bits >> 7) & 1) != 0)
824    }
825    ///Bit 8 - Start generation
826    #[inline(always)]
827    pub fn start(&self) -> START_R {
828        START_R::new(((self.bits >> 8) & 1) != 0)
829    }
830    ///Bit 9 - Stop generation
831    #[inline(always)]
832    pub fn stop(&self) -> STOP_R {
833        STOP_R::new(((self.bits >> 9) & 1) != 0)
834    }
835    ///Bit 10 - Acknowledge enable
836    #[inline(always)]
837    pub fn ack(&self) -> ACK_R {
838        ACK_R::new(((self.bits >> 10) & 1) != 0)
839    }
840    ///Bit 11 - Acknowledge/PEC Position (for data reception)
841    #[inline(always)]
842    pub fn pos(&self) -> POS_R {
843        POS_R::new(((self.bits >> 11) & 1) != 0)
844    }
845    ///Bit 12 - Packet error checking
846    #[inline(always)]
847    pub fn pec(&self) -> PEC_R {
848        PEC_R::new(((self.bits >> 12) & 1) != 0)
849    }
850    ///Bit 13 - SMBus alert
851    #[inline(always)]
852    pub fn alert(&self) -> ALERT_R {
853        ALERT_R::new(((self.bits >> 13) & 1) != 0)
854    }
855    ///Bit 15 - Software reset
856    #[inline(always)]
857    pub fn swrst(&self) -> SWRST_R {
858        SWRST_R::new(((self.bits >> 15) & 1) != 0)
859    }
860}
861impl core::fmt::Debug for R {
862    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
863        f.debug_struct("CR1")
864            .field("swrst", &self.swrst())
865            .field("alert", &self.alert())
866            .field("pec", &self.pec())
867            .field("pos", &self.pos())
868            .field("ack", &self.ack())
869            .field("stop", &self.stop())
870            .field("start", &self.start())
871            .field("nostretch", &self.nostretch())
872            .field("engc", &self.engc())
873            .field("enpec", &self.enpec())
874            .field("enarp", &self.enarp())
875            .field("smbtype", &self.smbtype())
876            .field("smbus", &self.smbus())
877            .field("pe", &self.pe())
878            .finish()
879    }
880}
881impl W {
882    ///Bit 0 - Peripheral enable
883    #[inline(always)]
884    pub fn pe(&mut self) -> PE_W<CR1rs> {
885        PE_W::new(self, 0)
886    }
887    ///Bit 1 - SMBus mode
888    #[inline(always)]
889    pub fn smbus(&mut self) -> SMBUS_W<CR1rs> {
890        SMBUS_W::new(self, 1)
891    }
892    ///Bit 3 - SMBus type
893    #[inline(always)]
894    pub fn smbtype(&mut self) -> SMBTYPE_W<CR1rs> {
895        SMBTYPE_W::new(self, 3)
896    }
897    ///Bit 4 - ARP enable
898    #[inline(always)]
899    pub fn enarp(&mut self) -> ENARP_W<CR1rs> {
900        ENARP_W::new(self, 4)
901    }
902    ///Bit 5 - PEC enable
903    #[inline(always)]
904    pub fn enpec(&mut self) -> ENPEC_W<CR1rs> {
905        ENPEC_W::new(self, 5)
906    }
907    ///Bit 6 - General call enable
908    #[inline(always)]
909    pub fn engc(&mut self) -> ENGC_W<CR1rs> {
910        ENGC_W::new(self, 6)
911    }
912    ///Bit 7 - Clock stretching disable (Slave mode)
913    #[inline(always)]
914    pub fn nostretch(&mut self) -> NOSTRETCH_W<CR1rs> {
915        NOSTRETCH_W::new(self, 7)
916    }
917    ///Bit 8 - Start generation
918    #[inline(always)]
919    pub fn start(&mut self) -> START_W<CR1rs> {
920        START_W::new(self, 8)
921    }
922    ///Bit 9 - Stop generation
923    #[inline(always)]
924    pub fn stop(&mut self) -> STOP_W<CR1rs> {
925        STOP_W::new(self, 9)
926    }
927    ///Bit 10 - Acknowledge enable
928    #[inline(always)]
929    pub fn ack(&mut self) -> ACK_W<CR1rs> {
930        ACK_W::new(self, 10)
931    }
932    ///Bit 11 - Acknowledge/PEC Position (for data reception)
933    #[inline(always)]
934    pub fn pos(&mut self) -> POS_W<CR1rs> {
935        POS_W::new(self, 11)
936    }
937    ///Bit 12 - Packet error checking
938    #[inline(always)]
939    pub fn pec(&mut self) -> PEC_W<CR1rs> {
940        PEC_W::new(self, 12)
941    }
942    ///Bit 13 - SMBus alert
943    #[inline(always)]
944    pub fn alert(&mut self) -> ALERT_W<CR1rs> {
945        ALERT_W::new(self, 13)
946    }
947    ///Bit 15 - Software reset
948    #[inline(always)]
949    pub fn swrst(&mut self) -> SWRST_W<CR1rs> {
950        SWRST_W::new(self, 15)
951    }
952}
953/**Control register 1
954
955You can [`read`](crate::Reg::read) this register and get [`cr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
956
957See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F102.html#I2C1:CR1)*/
958pub struct CR1rs;
959impl crate::RegisterSpec for CR1rs {
960    type Ux = u16;
961}
962///`read()` method returns [`cr1::R`](R) reader structure
963impl crate::Readable for CR1rs {}
964///`write(|w| ..)` method takes [`cr1::W`](W) writer structure
965impl crate::Writable for CR1rs {
966    type Safety = crate::Unsafe;
967}
968///`reset()` method sets CR1 to value 0
969impl crate::Resettable for CR1rs {}
stm32f1_staging/stm32f102/i2c1/cr1.rs

stm32f1_staging/stm32f102/i2c1/
cr1.rs
