stm32f1_hal/afio/
uart_remap.rs

1#![allow(unused_variables)]
2use super::*;
3use crate::{
4    gpio::*,
5    pac::{UART4, UART5, USART1, USART2, USART3},
6};
7
8// table
9// Do NOT manually modify the code.
10// It's generated by scripts/generate_remap_table.py from scripts/table/stm32f1_remap_peripheral.csv
11
12// Binder types ------------------
13
14pub trait UartCkPin<REMAP> {}
15impl<T> UartCkPin<T> for NonePin {}
16pub trait UartCtsPin<REMAP> {}
17impl<T> UartCtsPin<T> for NonePin {}
18pub trait UartRtsPin<REMAP> {}
19impl<T> UartRtsPin<T> for NonePin {}
20pub trait UartRxPin<REMAP> {}
21impl<T> UartRxPin<T> for NonePin {}
22pub trait UartTxPin<REMAP> {}
23impl<T> UartTxPin<T> for NonePin {}
24
25// Bind pins ---------------------
26
27impl<PULL: UpMode> UartRxPin<RemapDefault<UART4>> for PC11<Input<PULL>> {}
28impl UartTxPin<RemapDefault<UART4>> for PC10<Alternate<PushPull>> {}
29impl<PULL: UpMode> UartRxPin<RemapDefault<UART5>> for PD2<Input<PULL>> {}
30impl UartTxPin<RemapDefault<UART5>> for PC12<Alternate<PushPull>> {}
31impl<PULL: UpMode> UartRxPin<RemapDefault<USART1>> for PA10<Input<PULL>> {}
32impl UartTxPin<RemapDefault<USART1>> for PA9<Alternate<PushPull>> {}
33impl<PULL: UpMode> UartRxPin<RemapFull<USART1>> for PB7<Input<PULL>> {}
34impl UartTxPin<RemapFull<USART1>> for PB6<Alternate<PushPull>> {}
35impl UartCkPin<RemapDefault<USART2>> for PA4<Alternate<PushPull>> {}
36impl<PULL: UpMode> UartRxPin<RemapDefault<USART2>> for PA3<Input<PULL>> {}
37impl UartTxPin<RemapDefault<USART2>> for PA2<Alternate<PushPull>> {}
38impl UartCkPin<RemapFull<USART2>> for PD7<Alternate<PushPull>> {}
39impl<PULL: UpMode> UartRxPin<RemapFull<USART2>> for PD6<Input<PULL>> {}
40impl UartTxPin<RemapFull<USART2>> for PD5<Alternate<PushPull>> {}
41impl UartCkPin<RemapDefault<USART3>> for PB12<Alternate<PushPull>> {}
42impl<PULL: UpMode> UartRxPin<RemapDefault<USART3>> for PB11<Input<PULL>> {}
43impl UartTxPin<RemapDefault<USART3>> for PB10<Alternate<PushPull>> {}
44impl UartCkPin<RemapFull<USART3>> for PD10<Alternate<PushPull>> {}
45impl<PULL: UpMode> UartRxPin<RemapFull<USART3>> for PD9<Input<PULL>> {}
46impl UartTxPin<RemapFull<USART3>> for PD8<Alternate<PushPull>> {}
47impl UartCkPin<RemapPartial1<USART3>> for PC12<Alternate<PushPull>> {}
48impl<PULL: UpMode> UartRxPin<RemapPartial1<USART3>> for PC11<Input<PULL>> {}
49impl UartTxPin<RemapPartial1<USART3>> for PC10<Alternate<PushPull>> {}
50
51// Register operations ------------
52
53impl RemapMode<UART4> for RemapDefault<UART4> {
54    fn remap(afio: &mut Afio) {}
55}
56impl RemapMode<UART5> for RemapDefault<UART5> {
57    fn remap(afio: &mut Afio) {}
58}
59impl RemapMode<USART1> for RemapDefault<USART1> {
60    fn remap(afio: &mut Afio) {
61        afio.mapr.modify_mapr(|_, w| w.usart1_remap().clear_bit());
62    }
63}
64impl RemapMode<USART1> for RemapFull<USART1> {
65    fn remap(afio: &mut Afio) {
66        afio.mapr.modify_mapr(|_, w| w.usart1_remap().set_bit());
67    }
68}
69impl RemapMode<USART2> for RemapDefault<USART2> {
70    fn remap(afio: &mut Afio) {
71        afio.mapr.modify_mapr(|_, w| w.usart2_remap().clear_bit());
72    }
73}
74impl RemapMode<USART2> for RemapFull<USART2> {
75    fn remap(afio: &mut Afio) {
76        afio.mapr.modify_mapr(|_, w| w.usart2_remap().set_bit());
77    }
78}
79impl RemapMode<USART3> for RemapDefault<USART3> {
80    fn remap(afio: &mut Afio) {
81        afio.mapr
82            .modify_mapr(unsafe { |_, w| w.usart3_remap().bits(0b00) });
83    }
84}
85impl RemapMode<USART3> for RemapFull<USART3> {
86    fn remap(afio: &mut Afio) {
87        afio.mapr
88            .modify_mapr(unsafe { |_, w| w.usart3_remap().bits(0b11) });
89    }
90}
91impl RemapMode<USART3> for RemapPartial1<USART3> {
92    fn remap(afio: &mut Afio) {
93        afio.mapr
94            .modify_mapr(unsafe { |_, w| w.usart3_remap().bits(0b01) });
95    }
96}
stm32f1_hal/afio/uart_remap.rs

stm32f1_hal/afio/
uart_remap.rs
