stm32f1_hal/common/dma/
mod.rs

1mod circular_buffer_rx;
2mod ringbuf_tx;
3
4pub use circular_buffer_rx::*;
5pub use ringbuf_tx::*;
6
7use crate::os_trait::prelude::*;
8
9pub trait DmaChannel {
10    fn start(&mut self);
11    fn stop(&mut self);
12
13    fn set_peripheral_address<T: Sized + Copy>(
14        &mut self,
15        address: usize,
16        mem_to_periph: bool,
17        increase: bool,
18        circular: bool,
19    );
20    fn set_memory_address(&mut self, address: usize, increase: bool);
21    fn set_transfer_length(&mut self, len: usize);
22    fn set_memory_buf_for_peripheral<T: Sized + Copy>(&mut self, buf: &[T]) {
23        self.set_memory_address(buf.as_ptr() as usize, true);
24        self.set_transfer_length(buf.len());
25    }
26
27    fn set_memory_to_memory<T: Sized + Copy>(
28        &mut self,
29        src_addr: usize,
30        dst_addr: usize,
31        len: usize,
32    );
33
34    fn get_unprocessed_len(&self) -> usize;
35    fn in_progress(&self) -> bool;
36
37    fn set_interrupt(&mut self, event: DmaEvent, enable: bool);
38    fn is_interrupted(&mut self, event: DmaEvent) -> bool;
39}
40
41#[derive(Clone, Copy, Debug, PartialEq, Eq)]
42pub enum DmaEvent {
43    TransferComplete,
44    HalfTransfer,
45}
stm32f1_hal/common/dma/mod.rs

stm32f1_hal/common/dma/
mod.rs
