stm32f1_hal/common/uart/
uart_poll.rs

1//! It doesn't depend on DMA or interrupts, relying instead on continuous polling.
2
3use super::*;
4use crate::os;
5use embedded_hal_nb as e_nb;
6use embedded_io as e_io;
7
8// TX -------------------------------------------------------------------------
9
10pub struct UartPollTx<U> {
11    uart: U,
12    retry_times: u32,
13    flush_retry_times: u32,
14}
15
16impl<U: UartPeriph> UartPollTx<U> {
17    pub(super) fn new(uart: U, retry_times: u32, flush_retry_times: u32) -> Self {
18        Self {
19            uart,
20            retry_times,
21            flush_retry_times,
22        }
23    }
24}
25
26impl<U: UartPeriph> e_nb::serial::ErrorType for UartPollTx<U> {
27    type Error = Error;
28}
29impl<U: UartPeriph> e_io::ErrorType for UartPollTx<U> {
30    type Error = Error;
31}
32
33// NB Write ----
34
35impl<U: UartPeriph> e_nb::serial::Write<u16> for UartPollTx<U> {
36    #[inline]
37    fn write(&mut self, word: u16) -> nb::Result<(), Self::Error> {
38        self.uart.write(word)
39    }
40
41    #[inline]
42    fn flush(&mut self) -> nb::Result<(), Self::Error> {
43        if self.uart.is_tx_empty() && self.uart.is_tx_complete() {
44            return Ok(());
45        }
46        Err(nb::Error::WouldBlock)
47    }
48}
49
50// IO Write ----
51
52impl<U: UartPeriph> e_io::Write for UartPollTx<U> {
53    fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
54        if buf.len() == 0 {
55            return Err(Error::Other);
56        }
57
58        // try first data
59        let mut rst = Err(nb::Error::WouldBlock);
60        for _ in 0..=self.retry_times {
61            rst = self.uart.write(buf[0] as u16);
62            if let Err(nb::Error::WouldBlock) = rst {
63                os::yield_cpu();
64            } else {
65                break;
66            }
67        }
68
69        match rst {
70            Ok(()) => (),
71            Err(nb::Error::WouldBlock) => return Err(Error::Busy),
72            Err(nb::Error::Other(_)) => return Err(Error::Other),
73        }
74
75        // write rest data
76        for (i, &data) in buf[1..buf.len()].iter().enumerate() {
77            if self.uart.write(data as u16).is_err() {
78                return Ok(i + 1);
79            }
80        }
81        Ok(buf.len())
82    }
83
84    fn flush(&mut self) -> Result<(), Self::Error> {
85        for _ in 0..=self.flush_retry_times {
86            if self.uart.is_tx_empty() && self.uart.is_tx_complete() {
87                return Ok(());
88            }
89            os::yield_cpu();
90        }
91        Err(Error::Other)
92    }
93}
94
95// RX -------------------------------------------------------------------------
96
97pub struct UartPollRx<U> {
98    uart: U,
99    retry_times: u32,
100    continue_retry_times: u32,
101}
102
103impl<U: UartPeriph> UartPollRx<U> {
104    pub(super) fn new(uart: U, retry_times: u32, continue_retry_times: u32) -> Self {
105        Self {
106            uart,
107            retry_times,
108            continue_retry_times,
109        }
110    }
111}
112
113impl<U: UartPeriph> e_nb::serial::ErrorType for UartPollRx<U> {
114    type Error = Error;
115}
116impl<U: UartPeriph> e_io::ErrorType for UartPollRx<U> {
117    type Error = Error;
118}
119
120// NB Read ----
121
122impl<U: UartPeriph> e_nb::serial::Read<u16> for UartPollRx<U> {
123    #[inline]
124    fn read(&mut self) -> nb::Result<u16, Self::Error> {
125        self.uart.read()
126    }
127}
128
129// IO Read ----
130
131impl<U: UartPeriph> e_io::Read for UartPollRx<U> {
132    fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
133        if buf.len() == 0 {
134            return Err(Error::Other);
135        }
136
137        // try first data
138        let mut rst = Err(nb::Error::WouldBlock);
139        for _ in 0..=self.retry_times {
140            rst = self.uart.read();
141            if let Err(nb::Error::WouldBlock) = rst {
142                os::yield_cpu();
143            } else {
144                break;
145            }
146        }
147
148        match rst {
149            Ok(data) => buf[0] = data as u8,
150            _ => return Err(Error::Other),
151        }
152
153        let mut retry = 0;
154        let mut n = 1;
155        while n < buf.len() {
156            match self.uart.read() {
157                Ok(data) => {
158                    buf[n] = data as u8;
159                    n += 1;
160                    retry = 0;
161                }
162                Err(nb::Error::Other(_)) => return Ok(n),
163                Err(nb::Error::WouldBlock) => {
164                    if retry >= self.continue_retry_times {
165                        return Ok(n);
166                    }
167                    retry += 1;
168                    os::yield_cpu();
169                }
170            }
171        }
172        Ok(buf.len())
173    }
174}
stm32f1_hal/common/uart/uart_poll.rs

stm32f1_hal/common/uart/
uart_poll.rs
