stm32f1_hal/afio/
timer_remap.rs

1#![allow(unused_variables)]
2use super::*;
3use crate::{gpio::*, pac::*};
4
5// table
6// Do NOT manually modify the code.
7// It's generated by scripts/generate_remap_table.py from scripts/table/stm32f1_remap_peripheral.csv
8
9// Binder types ------------------
10
11pub trait TimBkinPin<REMAP> {}
12impl<T> TimBkinPin<T> for NonePin {}
13pub trait TimCh1Pin<REMAP> {}
14impl<T> TimCh1Pin<T> for NonePin {}
15pub trait TimCh1nPin<REMAP> {}
16impl<T> TimCh1nPin<T> for NonePin {}
17pub trait TimCh2Pin<REMAP> {}
18impl<T> TimCh2Pin<T> for NonePin {}
19pub trait TimCh2nPin<REMAP> {}
20impl<T> TimCh2nPin<T> for NonePin {}
21pub trait TimCh3Pin<REMAP> {}
22impl<T> TimCh3Pin<T> for NonePin {}
23pub trait TimCh3nPin<REMAP> {}
24impl<T> TimCh3nPin<T> for NonePin {}
25pub trait TimCh4Pin<REMAP> {}
26impl<T> TimCh4Pin<T> for NonePin {}
27pub trait TimEtrPin<REMAP> {}
28impl<T> TimEtrPin<T> for NonePin {}
29
30// Bind pins ---------------------
31
32#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
33impl TimCh1Pin<RemapDefault<TIM1>> for PA8<Alternate<PushPull>> {}
34#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
35impl TimCh2Pin<RemapDefault<TIM1>> for PA9<Alternate<PushPull>> {}
36#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
37impl TimCh3Pin<RemapDefault<TIM1>> for PA10<Alternate<PushPull>> {}
38#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
39impl TimCh4Pin<RemapDefault<TIM1>> for PA11<Alternate<PushPull>> {}
40#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
41impl TimCh1Pin<RemapFull<TIM1>> for PE9<Alternate<PushPull>> {}
42#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
43impl TimCh2Pin<RemapFull<TIM1>> for PE11<Alternate<PushPull>> {}
44#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
45impl TimCh3Pin<RemapFull<TIM1>> for PE13<Alternate<PushPull>> {}
46#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
47impl TimCh4Pin<RemapFull<TIM1>> for PE14<Alternate<PushPull>> {}
48#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
49impl TimCh1Pin<RemapPartial1<TIM1>> for PA8<Alternate<PushPull>> {}
50#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
51impl TimCh2Pin<RemapPartial1<TIM1>> for PA9<Alternate<PushPull>> {}
52#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
53impl TimCh3Pin<RemapPartial1<TIM1>> for PA10<Alternate<PushPull>> {}
54#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
55impl TimCh4Pin<RemapPartial1<TIM1>> for PA11<Alternate<PushPull>> {}
56impl TimCh1Pin<RemapDefault<TIM10>> for PB8<Alternate<PushPull>> {}
57#[cfg(any(feature = "xl", feature = "high"))]
58impl TimCh1Pin<RemapFull<TIM10>> for PF6<Alternate<PushPull>> {}
59impl TimCh1Pin<RemapDefault<TIM11>> for PB9<Alternate<PushPull>> {}
60#[cfg(any(feature = "xl", feature = "high"))]
61impl TimCh1Pin<RemapFull<TIM11>> for PF7<Alternate<PushPull>> {}
62impl TimCh1Pin<RemapDefault<TIM12>> for PB14<Alternate<PushPull>> {}
63impl TimCh2Pin<RemapDefault<TIM12>> for PB15<Alternate<PushPull>> {}
64impl TimCh1Pin<RemapDefault<TIM13>> for PA6<Alternate<PushPull>> {}
65#[cfg(any(feature = "xl", feature = "high"))]
66impl TimCh1Pin<RemapFull<TIM13>> for PF8<Alternate<PushPull>> {}
67impl TimCh1Pin<RemapDefault<TIM14>> for PA7<Alternate<PushPull>> {}
68#[cfg(any(feature = "xl", feature = "high"))]
69impl TimCh1Pin<RemapFull<TIM14>> for PF9<Alternate<PushPull>> {}
70impl TimCh1Pin<RemapDefault<TIM2>> for PA0<Alternate<PushPull>> {}
71impl TimCh2Pin<RemapDefault<TIM2>> for PA1<Alternate<PushPull>> {}
72impl TimCh3Pin<RemapDefault<TIM2>> for PA2<Alternate<PushPull>> {}
73impl TimCh4Pin<RemapDefault<TIM2>> for PA3<Alternate<PushPull>> {}
74impl TimCh1Pin<RemapFull<TIM2>> for PA15<Alternate<PushPull>> {}
75impl TimCh2Pin<RemapFull<TIM2>> for PB3<Alternate<PushPull>> {}
76impl TimCh3Pin<RemapFull<TIM2>> for PB10<Alternate<PushPull>> {}
77impl TimCh4Pin<RemapFull<TIM2>> for PB11<Alternate<PushPull>> {}
78impl TimCh1Pin<RemapPartial1<TIM2>> for PA15<Alternate<PushPull>> {}
79impl TimCh2Pin<RemapPartial1<TIM2>> for PB3<Alternate<PushPull>> {}
80impl TimCh3Pin<RemapPartial1<TIM2>> for PA2<Alternate<PushPull>> {}
81impl TimCh4Pin<RemapPartial1<TIM2>> for PA3<Alternate<PushPull>> {}
82impl TimCh1Pin<RemapPartial2<TIM2>> for PA0<Alternate<PushPull>> {}
83impl TimCh2Pin<RemapPartial2<TIM2>> for PA1<Alternate<PushPull>> {}
84impl TimCh3Pin<RemapPartial2<TIM2>> for PB10<Alternate<PushPull>> {}
85impl TimCh4Pin<RemapPartial2<TIM2>> for PB11<Alternate<PushPull>> {}
86impl TimCh1Pin<RemapDefault<TIM3>> for PA6<Alternate<PushPull>> {}
87impl TimCh2Pin<RemapDefault<TIM3>> for PA7<Alternate<PushPull>> {}
88impl TimCh3Pin<RemapDefault<TIM3>> for PB0<Alternate<PushPull>> {}
89impl TimCh4Pin<RemapDefault<TIM3>> for PB1<Alternate<PushPull>> {}
90impl TimCh1Pin<RemapFull<TIM3>> for PC6<Alternate<PushPull>> {}
91impl TimCh2Pin<RemapFull<TIM3>> for PC7<Alternate<PushPull>> {}
92impl TimCh3Pin<RemapFull<TIM3>> for PC8<Alternate<PushPull>> {}
93impl TimCh4Pin<RemapFull<TIM3>> for PC9<Alternate<PushPull>> {}
94impl TimCh1Pin<RemapPartial1<TIM3>> for PB4<Alternate<PushPull>> {}
95impl TimCh2Pin<RemapPartial1<TIM3>> for PB5<Alternate<PushPull>> {}
96impl TimCh3Pin<RemapPartial1<TIM3>> for PB0<Alternate<PushPull>> {}
97impl TimCh4Pin<RemapPartial1<TIM3>> for PB1<Alternate<PushPull>> {}
98#[cfg(feature = "medium")]
99impl TimCh1Pin<RemapDefault<TIM4>> for PB6<Alternate<PushPull>> {}
100#[cfg(feature = "medium")]
101impl TimCh2Pin<RemapDefault<TIM4>> for PB7<Alternate<PushPull>> {}
102#[cfg(feature = "medium")]
103impl TimCh3Pin<RemapDefault<TIM4>> for PB8<Alternate<PushPull>> {}
104#[cfg(feature = "medium")]
105impl TimCh4Pin<RemapDefault<TIM4>> for PB9<Alternate<PushPull>> {}
106#[cfg(feature = "medium")]
107impl TimCh1Pin<RemapFull<TIM4>> for PD12<Alternate<PushPull>> {}
108#[cfg(feature = "medium")]
109impl TimCh2Pin<RemapFull<TIM4>> for PD13<Alternate<PushPull>> {}
110#[cfg(feature = "medium")]
111impl TimCh3Pin<RemapFull<TIM4>> for PD14<Alternate<PushPull>> {}
112#[cfg(feature = "medium")]
113impl TimCh4Pin<RemapFull<TIM4>> for PD15<Alternate<PushPull>> {}
114impl TimCh1Pin<RemapDefault<TIM5>> for PA0<Alternate<PushPull>> {}
115impl TimCh2Pin<RemapDefault<TIM5>> for PA1<Alternate<PushPull>> {}
116impl TimCh3Pin<RemapDefault<TIM5>> for PA2<Alternate<PushPull>> {}
117impl TimCh4Pin<RemapDefault<TIM5>> for PA3<Alternate<PushPull>> {}
118impl TimCh1Pin<RemapFull<TIM5>> for PA0<Alternate<PushPull>> {}
119impl TimCh2Pin<RemapFull<TIM5>> for PA1<Alternate<PushPull>> {}
120impl TimCh3Pin<RemapFull<TIM5>> for PA2<Alternate<PushPull>> {}
121impl TimCh1Pin<RemapDefault<TIM8>> for PC6<Alternate<PushPull>> {}
122impl TimCh2Pin<RemapDefault<TIM8>> for PC7<Alternate<PushPull>> {}
123impl TimCh3Pin<RemapDefault<TIM8>> for PC8<Alternate<PushPull>> {}
124impl TimCh4Pin<RemapDefault<TIM8>> for PC9<Alternate<PushPull>> {}
125impl TimCh1Pin<RemapDefault<TIM9>> for PA2<Alternate<PushPull>> {}
126impl TimCh2Pin<RemapDefault<TIM9>> for PA3<Alternate<PushPull>> {}
127impl TimCh1Pin<RemapFull<TIM9>> for PE5<Alternate<PushPull>> {}
128impl TimCh2Pin<RemapFull<TIM9>> for PE6<Alternate<PushPull>> {}
129
130// Register operation ------------
131
132#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
133impl RemapMode<TIM1> for RemapDefault<TIM1> {
134    fn remap(afio: &mut Afio) {
135        afio.mapr
136            .modify_mapr(unsafe { |_, w| w.tim1_remap().bits(0b00) });
137    }
138}
139#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
140impl RemapMode<TIM1> for RemapFull<TIM1> {
141    fn remap(afio: &mut Afio) {
142        afio.mapr
143            .modify_mapr(unsafe { |_, w| w.tim1_remap().bits(0b11) });
144    }
145}
146#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
147impl RemapMode<TIM1> for RemapPartial1<TIM1> {
148    fn remap(afio: &mut Afio) {
149        afio.mapr
150            .modify_mapr(unsafe { |_, w| w.tim1_remap().bits(0b01) });
151    }
152}
153impl RemapMode<TIM10> for RemapDefault<TIM10> {
154    fn remap(afio: &mut Afio) {
155        afio.mapr2.modify_mapr(|_, w| w.tim10_remap().clear_bit());
156    }
157}
158impl RemapMode<TIM10> for RemapFull<TIM10> {
159    fn remap(afio: &mut Afio) {
160        afio.mapr2.modify_mapr(|_, w| w.tim10_remap().set_bit());
161    }
162}
163impl RemapMode<TIM11> for RemapDefault<TIM11> {
164    fn remap(afio: &mut Afio) {
165        afio.mapr2.modify_mapr(|_, w| w.tim11_remap().clear_bit());
166    }
167}
168impl RemapMode<TIM11> for RemapFull<TIM11> {
169    fn remap(afio: &mut Afio) {
170        afio.mapr2.modify_mapr(|_, w| w.tim11_remap().set_bit());
171    }
172}
173impl RemapMode<TIM12> for RemapDefault<TIM12> {
174    fn remap(afio: &mut Afio) {}
175}
176impl RemapMode<TIM13> for RemapDefault<TIM13> {
177    fn remap(afio: &mut Afio) {
178        afio.mapr2.modify_mapr(|_, w| w.tim13_remap().clear_bit());
179    }
180}
181impl RemapMode<TIM13> for RemapFull<TIM13> {
182    fn remap(afio: &mut Afio) {
183        afio.mapr2.modify_mapr(|_, w| w.tim13_remap().set_bit());
184    }
185}
186impl RemapMode<TIM14> for RemapDefault<TIM14> {
187    fn remap(afio: &mut Afio) {
188        afio.mapr2.modify_mapr(|_, w| w.tim14_remap().clear_bit());
189    }
190}
191impl RemapMode<TIM14> for RemapFull<TIM14> {
192    fn remap(afio: &mut Afio) {
193        afio.mapr2.modify_mapr(|_, w| w.tim14_remap().set_bit());
194    }
195}
196impl RemapMode<TIM2> for RemapDefault<TIM2> {
197    fn remap(afio: &mut Afio) {
198        afio.mapr
199            .modify_mapr(unsafe { |_, w| w.tim2_remap().bits(0b00) });
200    }
201}
202impl RemapMode<TIM2> for RemapFull<TIM2> {
203    fn remap(afio: &mut Afio) {
204        afio.mapr
205            .modify_mapr(unsafe { |_, w| w.tim2_remap().bits(0b11) });
206    }
207}
208impl RemapMode<TIM2> for RemapPartial1<TIM2> {
209    fn remap(afio: &mut Afio) {
210        afio.mapr
211            .modify_mapr(unsafe { |_, w| w.tim2_remap().bits(0b01) });
212    }
213}
214impl RemapMode<TIM2> for RemapPartial2<TIM2> {
215    fn remap(afio: &mut Afio) {
216        afio.mapr
217            .modify_mapr(unsafe { |_, w| w.tim2_remap().bits(0b10) });
218    }
219}
220impl RemapMode<TIM3> for RemapDefault<TIM3> {
221    fn remap(afio: &mut Afio) {
222        afio.mapr
223            .modify_mapr(unsafe { |_, w| w.tim3_remap().bits(0b00) });
224    }
225}
226impl RemapMode<TIM3> for RemapFull<TIM3> {
227    fn remap(afio: &mut Afio) {
228        afio.mapr
229            .modify_mapr(unsafe { |_, w| w.tim3_remap().bits(0b11) });
230    }
231}
232impl RemapMode<TIM3> for RemapPartial1<TIM3> {
233    fn remap(afio: &mut Afio) {
234        afio.mapr
235            .modify_mapr(unsafe { |_, w| w.tim3_remap().bits(0b10) });
236    }
237}
238#[cfg(feature = "medium")]
239impl RemapMode<TIM4> for RemapDefault<TIM4> {
240    fn remap(afio: &mut Afio) {
241        afio.mapr.modify_mapr(|_, w| w.tim4_remap().clear_bit());
242    }
243}
244#[cfg(feature = "medium")]
245impl RemapMode<TIM4> for RemapFull<TIM4> {
246    fn remap(afio: &mut Afio) {
247        afio.mapr.modify_mapr(|_, w| w.tim4_remap().set_bit());
248    }
249}
250impl RemapMode<TIM5> for RemapDefault<TIM5> {
251    fn remap(afio: &mut Afio) {
252        afio.mapr.modify_mapr(|_, w| w.tim5ch4_iremap().clear_bit());
253    }
254}
255impl RemapMode<TIM5> for RemapFull<TIM5> {
256    fn remap(afio: &mut Afio) {
257        afio.mapr.modify_mapr(|_, w| w.tim5ch4_iremap().set_bit());
258    }
259}
260impl RemapMode<TIM8> for RemapDefault<TIM8> {
261    fn remap(afio: &mut Afio) {}
262}
263impl RemapMode<TIM9> for RemapDefault<TIM9> {
264    fn remap(afio: &mut Afio) {
265        afio.mapr2.modify_mapr(|_, w| w.tim9_remap().clear_bit());
266    }
267}
268impl RemapMode<TIM9> for RemapFull<TIM9> {
269    fn remap(afio: &mut Afio) {
270        afio.mapr2.modify_mapr(|_, w| w.tim9_remap().set_bit());
271    }
272}
stm32f1_hal/afio/timer_remap.rs

stm32f1_hal/afio/
timer_remap.rs
