Enum stm32f0xx_hal::stm32::rcc::cfgr::PLLNODIV_A

pub enum PLLNODIV_A {
    DIV2,
    DIV1,
}

PLL clock not divided for MCO

Value on reset: 0

Variants

DIV2

0: PLL is divided by 2 for MCO

DIV1

1: PLL is not divided for MCO

Trait Implementations

impl Clone for PLLNODIV_A

pub fn clone(&self) -> PLLNODIV_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for PLLNODIV_A

pub fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl PartialEq<PLLNODIV_A> for PLLNODIV_A

pub fn eq(&self, other: &PLLNODIV_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for PLLNODIV_A

impl StructuralPartialEq for PLLNODIV_A