Struct stm32f0x2::i2c1::isr::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn addcode(&self) -> ADDCODER[src]
Bits 17:23 - Address match code (Slave mode)
fn dir(&self) -> DIRR[src]
Bit 16 - Transfer direction (Slave mode)
fn busy(&self) -> BUSYR[src]
Bit 15 - Bus busy
fn alert(&self) -> ALERTR[src]
Bit 13 - SMBus alert
fn timeout(&self) -> TIMEOUTR[src]
Bit 12 - Timeout or t_low detection flag
fn pecerr(&self) -> PECERRR[src]
Bit 11 - PEC Error in reception
fn ovr(&self) -> OVRR[src]
Bit 10 - Overrun/Underrun (slave mode)
fn arlo(&self) -> ARLOR[src]
Bit 9 - Arbitration lost
fn berr(&self) -> BERRR[src]
Bit 8 - Bus error
fn tcr(&self) -> TCRR[src]
Bit 7 - Transfer Complete Reload
fn tc(&self) -> TCR[src]
Bit 6 - Transfer Complete (master mode)
fn stopf(&self) -> STOPFR[src]
Bit 5 - Stop detection flag
fn nackf(&self) -> NACKFR[src]
Bit 4 - Not acknowledge received flag
fn addr(&self) -> ADDRR[src]
Bit 3 - Address matched (slave mode)
fn rxne(&self) -> RXNER[src]
Bit 2 - Receive data register not empty (receivers)
fn txis(&self) -> TXISR[src]
Bit 1 - Transmit interrupt status (transmitters)
fn txe(&self) -> TXER[src]
Bit 0 - Transmit data register empty (transmitters)