Module stm32f0x0::rcc [−][src]
Reset and clock control
Modules
ahbenr |
AHB Peripheral Clock enable register (RCC_AHBENR) |
ahbrstr |
AHB peripheral reset register |
apb1enr |
APB1 peripheral clock enable register (RCC_APB1ENR) |
apb1rstr |
APB1 peripheral reset register (RCC_APB1RSTR) |
apb2enr |
APB2 peripheral clock enable register (RCC_APB2ENR) |
apb2rstr |
APB2 peripheral reset register (RCC_APB2RSTR) |
bdcr |
Backup domain control register (RCC_BDCR) |
cfgr |
Clock configuration register (RCC_CFGR) |
cfgr2 |
Clock configuration register 2 |
cfgr3 |
Clock configuration register 3 |
cir |
Clock interrupt register (RCC_CIR) |
cr |
Clock control register |
cr2 |
Clock control register 2 |
csr |
Control/status register (RCC_CSR) |
Structs
AHBENR |
AHB Peripheral Clock enable register (RCC_AHBENR) |
AHBRSTR |
AHB peripheral reset register |
APB1ENR |
APB1 peripheral clock enable register (RCC_APB1ENR) |
APB1RSTR |
APB1 peripheral reset register (RCC_APB1RSTR) |
APB2ENR |
APB2 peripheral clock enable register (RCC_APB2ENR) |
APB2RSTR |
APB2 peripheral reset register (RCC_APB2RSTR) |
BDCR |
Backup domain control register (RCC_BDCR) |
CFGR |
Clock configuration register (RCC_CFGR) |
CFGR2 |
Clock configuration register 2 |
CFGR3 |
Clock configuration register 3 |
CIR |
Clock interrupt register (RCC_CIR) |
CR |
Clock control register |
CR2 |
Clock control register 2 |
CSR |
Control/status register (RCC_CSR) |
RegisterBlock |
Register block |