stm32f072x_memory_map/
dbgmcu.rs1# ! [ doc = "Debug support" ]
2# [ doc = r" Register block" ]
3# [ repr ( C ) ]
4pub struct Dbgmcu {
5 # [ doc = "0x00 - MCU Device ID Code Register" ]
6 pub idcode: Idcode,
7 # [ doc = "0x04 - Debug MCU Configuration Register" ]
8 pub cr: Cr,
9 # [ doc = "0x08 - APB Low Freeze Register" ]
10 pub apblfz: Apblfz,
11 # [ doc = "0x0c - APB High Freeze Register" ]
12 pub apbhfz: Apbhfz,
13}
14
15# [ doc = "MCU Device ID Code Register" ]
16# [ repr ( C ) ]
17pub struct Idcode {
18 register: ::volatile_register::RO<u32>,
19}
20
21# [ doc = "MCU Device ID Code Register" ]
22pub mod idcode {
23 # [ doc = r" Value read from the register" ]
24 pub struct R {
25 bits: u32,
26 }
27 impl super::Idcode {
28 # [ doc = r" Reads the contents of the register" ]
29 pub fn read(&self) -> R {
30 R { bits: self.register.read() }
31 }
32 }
33 # [ doc = "Value of the field DEV_ID" ]
34 pub struct DevIdR {
35 bits: u16,
36 }
37 impl DevIdR {
38 # [ doc = r" Value of the field as raw bits" ]
39 pub fn bits(&self) -> u16 {
40 self.bits
41 }
42 }
43 # [ doc = "Value of the field DIV_ID" ]
44 pub struct DivIdR {
45 bits: u8,
46 }
47 impl DivIdR {
48 # [ doc = r" Value of the field as raw bits" ]
49 pub fn bits(&self) -> u8 {
50 self.bits
51 }
52 }
53 # [ doc = "Value of the field REV_ID" ]
54 pub struct RevIdR {
55 bits: u16,
56 }
57 impl RevIdR {
58 # [ doc = r" Value of the field as raw bits" ]
59 pub fn bits(&self) -> u16 {
60 self.bits
61 }
62 }
63 impl R {
64 # [ doc = r" Value of the register as raw bits" ]
65 pub fn bits(&self) -> u32 {
66 self.bits
67 }
68 fn _dev_id(&self) -> u16 {
69 const MASK: u16 = 4095;
70 const OFFSET: u8 = 0;
71 ((self.bits >> OFFSET) & MASK as u32) as u16
72 }
73 # [ doc = "Bits 0:11 - Device Identifier" ]
74 pub fn dev_id(&self) -> DevIdR {
75 DevIdR { bits: self._dev_id() }
76 }
77 fn _div_id(&self) -> u8 {
78 const MASK: u8 = 15;
79 const OFFSET: u8 = 12;
80 ((self.bits >> OFFSET) & MASK as u32) as u8
81 }
82 # [ doc = "Bits 12:15 - Division Identifier" ]
83 pub fn div_id(&self) -> DivIdR {
84 DivIdR { bits: self._div_id() }
85 }
86 fn _rev_id(&self) -> u16 {
87 const MASK: u16 = 65535;
88 const OFFSET: u8 = 16;
89 ((self.bits >> OFFSET) & MASK as u32) as u16
90 }
91 # [ doc = "Bits 16:31 - Revision Identifier" ]
92 pub fn rev_id(&self) -> RevIdR {
93 RevIdR { bits: self._rev_id() }
94 }
95 }
96}
97
98# [ doc = "Debug MCU Configuration Register" ]
99# [ repr ( C ) ]
100pub struct Cr {
101 register: ::volatile_register::RW<u32>,
102}
103
104# [ doc = "Debug MCU Configuration Register" ]
105pub mod cr {
106 # [ doc = r" Value read from the register" ]
107 pub struct R {
108 bits: u32,
109 }
110 # [ doc = r" Value to write to the register" ]
111 pub struct W {
112 bits: u32,
113 }
114 impl super::Cr {
115 # [ doc = r" Modifies the contents of the register" ]
116 pub fn modify<F>(&mut self, f: F)
117 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
118 {
119 let bits = self.register.read();
120 let r = R { bits: bits };
121 let mut w = W { bits: bits };
122 f(&r, &mut w);
123 self.register.write(w.bits);
124 }
125 # [ doc = r" Reads the contents of the register" ]
126 pub fn read(&self) -> R {
127 R { bits: self.register.read() }
128 }
129 # [ doc = r" Writes to the register" ]
130 pub fn write<F>(&mut self, f: F)
131 where F: FnOnce(&mut W) -> &mut W
132 {
133 let mut w = W::reset_value();
134 f(&mut w);
135 self.register.write(w.bits);
136 }
137 }
138 # [ doc = "Value of the field DBG_STOP" ]
139 pub struct DbgStopR {
140 bits: u8,
141 }
142 impl DbgStopR {
143 # [ doc = r" Value of the field as raw bits" ]
144 pub fn bits(&self) -> u8 {
145 self.bits
146 }
147 }
148 # [ doc = "Value of the field DBG_STANDBY" ]
149 pub struct DbgStandbyR {
150 bits: u8,
151 }
152 impl DbgStandbyR {
153 # [ doc = r" Value of the field as raw bits" ]
154 pub fn bits(&self) -> u8 {
155 self.bits
156 }
157 }
158 # [ doc = r" Proxy" ]
159 pub struct _DbgStopW<'a> {
160 register: &'a mut W,
161 }
162 impl<'a> _DbgStopW<'a> {
163 # [ doc = r" Writes raw `bits` to the field" ]
164 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
165 const MASK: u8 = 1;
166 const OFFSET: u8 = 1;
167 self.register.bits &= !((MASK as u32) << OFFSET);
168 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
169 self.register
170 }
171 }
172 # [ doc = r" Proxy" ]
173 pub struct _DbgStandbyW<'a> {
174 register: &'a mut W,
175 }
176 impl<'a> _DbgStandbyW<'a> {
177 # [ doc = r" Writes raw `bits` to the field" ]
178 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
179 const MASK: u8 = 1;
180 const OFFSET: u8 = 2;
181 self.register.bits &= !((MASK as u32) << OFFSET);
182 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
183 self.register
184 }
185 }
186 impl R {
187 # [ doc = r" Value of the register as raw bits" ]
188 pub fn bits(&self) -> u32 {
189 self.bits
190 }
191 fn _dbg_stop(&self) -> u8 {
192 const MASK: u8 = 1;
193 const OFFSET: u8 = 1;
194 ((self.bits >> OFFSET) & MASK as u32) as u8
195 }
196 # [ doc = "Bit 1 - Debug Stop Mode" ]
197 pub fn dbg_stop(&self) -> DbgStopR {
198 DbgStopR { bits: self._dbg_stop() }
199 }
200 fn _dbg_standby(&self) -> u8 {
201 const MASK: u8 = 1;
202 const OFFSET: u8 = 2;
203 ((self.bits >> OFFSET) & MASK as u32) as u8
204 }
205 # [ doc = "Bit 2 - Debug Standby Mode" ]
206 pub fn dbg_standby(&self) -> DbgStandbyR {
207 DbgStandbyR { bits: self._dbg_standby() }
208 }
209 }
210 impl W {
211 # [ doc = r" Reset value of the register" ]
212 pub fn reset_value() -> W {
213 W { bits: 0 }
214 }
215 # [ doc = r" Writes raw `bits` to the register" ]
216 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
217 self.bits = bits;
218 self
219 }
220 # [ doc = "Bit 1 - Debug Stop Mode" ]
221 pub fn dbg_stop(&mut self) -> _DbgStopW {
222 _DbgStopW { register: self }
223 }
224 # [ doc = "Bit 2 - Debug Standby Mode" ]
225 pub fn dbg_standby(&mut self) -> _DbgStandbyW {
226 _DbgStandbyW { register: self }
227 }
228 }
229}
230
231# [ doc = "APB Low Freeze Register" ]
232# [ repr ( C ) ]
233pub struct Apblfz {
234 register: ::volatile_register::RW<u32>,
235}
236
237# [ doc = "APB Low Freeze Register" ]
238pub mod apblfz {
239 # [ doc = r" Value read from the register" ]
240 pub struct R {
241 bits: u32,
242 }
243 # [ doc = r" Value to write to the register" ]
244 pub struct W {
245 bits: u32,
246 }
247 impl super::Apblfz {
248 # [ doc = r" Modifies the contents of the register" ]
249 pub fn modify<F>(&mut self, f: F)
250 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
251 {
252 let bits = self.register.read();
253 let r = R { bits: bits };
254 let mut w = W { bits: bits };
255 f(&r, &mut w);
256 self.register.write(w.bits);
257 }
258 # [ doc = r" Reads the contents of the register" ]
259 pub fn read(&self) -> R {
260 R { bits: self.register.read() }
261 }
262 # [ doc = r" Writes to the register" ]
263 pub fn write<F>(&mut self, f: F)
264 where F: FnOnce(&mut W) -> &mut W
265 {
266 let mut w = W::reset_value();
267 f(&mut w);
268 self.register.write(w.bits);
269 }
270 }
271 # [ doc = "Value of the field DBG_TIMER2_STOP" ]
272 pub struct DbgTimer2StopR {
273 bits: u8,
274 }
275 impl DbgTimer2StopR {
276 # [ doc = r" Value of the field as raw bits" ]
277 pub fn bits(&self) -> u8 {
278 self.bits
279 }
280 }
281 # [ doc = "Value of the field DBG_TIMER3_STOP" ]
282 pub struct DbgTimer3StopR {
283 bits: u8,
284 }
285 impl DbgTimer3StopR {
286 # [ doc = r" Value of the field as raw bits" ]
287 pub fn bits(&self) -> u8 {
288 self.bits
289 }
290 }
291 # [ doc = "Value of the field DBG_TIMER6_STOP" ]
292 pub struct DbgTimer6StopR {
293 bits: u8,
294 }
295 impl DbgTimer6StopR {
296 # [ doc = r" Value of the field as raw bits" ]
297 pub fn bits(&self) -> u8 {
298 self.bits
299 }
300 }
301 # [ doc = "Value of the field DBG_TIMER14_STOP" ]
302 pub struct DbgTimer14StopR {
303 bits: u8,
304 }
305 impl DbgTimer14StopR {
306 # [ doc = r" Value of the field as raw bits" ]
307 pub fn bits(&self) -> u8 {
308 self.bits
309 }
310 }
311 # [ doc = "Value of the field DBG_RTC_STOP" ]
312 pub struct DbgRtcStopR {
313 bits: u8,
314 }
315 impl DbgRtcStopR {
316 # [ doc = r" Value of the field as raw bits" ]
317 pub fn bits(&self) -> u8 {
318 self.bits
319 }
320 }
321 # [ doc = "Value of the field DBG_WWDG_STOP" ]
322 pub struct DbgWwdgStopR {
323 bits: u8,
324 }
325 impl DbgWwdgStopR {
326 # [ doc = r" Value of the field as raw bits" ]
327 pub fn bits(&self) -> u8 {
328 self.bits
329 }
330 }
331 # [ doc = "Value of the field DBG_IWDG_STOP" ]
332 pub struct DbgIwdgStopR {
333 bits: u8,
334 }
335 impl DbgIwdgStopR {
336 # [ doc = r" Value of the field as raw bits" ]
337 pub fn bits(&self) -> u8 {
338 self.bits
339 }
340 }
341 # [ doc = "Value of the field I2C1_SMBUS_TIMEOUT" ]
342 pub struct I2c1SmbusTimeoutR {
343 bits: u8,
344 }
345 impl I2c1SmbusTimeoutR {
346 # [ doc = r" Value of the field as raw bits" ]
347 pub fn bits(&self) -> u8 {
348 self.bits
349 }
350 }
351 # [ doc = r" Proxy" ]
352 pub struct _DbgTimer2StopW<'a> {
353 register: &'a mut W,
354 }
355 impl<'a> _DbgTimer2StopW<'a> {
356 # [ doc = r" Writes raw `bits` to the field" ]
357 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
358 const MASK: u8 = 1;
359 const OFFSET: u8 = 0;
360 self.register.bits &= !((MASK as u32) << OFFSET);
361 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
362 self.register
363 }
364 }
365 # [ doc = r" Proxy" ]
366 pub struct _DbgTimer3StopW<'a> {
367 register: &'a mut W,
368 }
369 impl<'a> _DbgTimer3StopW<'a> {
370 # [ doc = r" Writes raw `bits` to the field" ]
371 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
372 const MASK: u8 = 1;
373 const OFFSET: u8 = 1;
374 self.register.bits &= !((MASK as u32) << OFFSET);
375 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
376 self.register
377 }
378 }
379 # [ doc = r" Proxy" ]
380 pub struct _DbgTimer6StopW<'a> {
381 register: &'a mut W,
382 }
383 impl<'a> _DbgTimer6StopW<'a> {
384 # [ doc = r" Writes raw `bits` to the field" ]
385 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
386 const MASK: u8 = 1;
387 const OFFSET: u8 = 4;
388 self.register.bits &= !((MASK as u32) << OFFSET);
389 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
390 self.register
391 }
392 }
393 # [ doc = r" Proxy" ]
394 pub struct _DbgTimer14StopW<'a> {
395 register: &'a mut W,
396 }
397 impl<'a> _DbgTimer14StopW<'a> {
398 # [ doc = r" Writes raw `bits` to the field" ]
399 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
400 const MASK: u8 = 1;
401 const OFFSET: u8 = 8;
402 self.register.bits &= !((MASK as u32) << OFFSET);
403 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
404 self.register
405 }
406 }
407 # [ doc = r" Proxy" ]
408 pub struct _DbgRtcStopW<'a> {
409 register: &'a mut W,
410 }
411 impl<'a> _DbgRtcStopW<'a> {
412 # [ doc = r" Writes raw `bits` to the field" ]
413 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
414 const MASK: u8 = 1;
415 const OFFSET: u8 = 10;
416 self.register.bits &= !((MASK as u32) << OFFSET);
417 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
418 self.register
419 }
420 }
421 # [ doc = r" Proxy" ]
422 pub struct _DbgWwdgStopW<'a> {
423 register: &'a mut W,
424 }
425 impl<'a> _DbgWwdgStopW<'a> {
426 # [ doc = r" Writes raw `bits` to the field" ]
427 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
428 const MASK: u8 = 1;
429 const OFFSET: u8 = 11;
430 self.register.bits &= !((MASK as u32) << OFFSET);
431 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
432 self.register
433 }
434 }
435 # [ doc = r" Proxy" ]
436 pub struct _DbgIwdgStopW<'a> {
437 register: &'a mut W,
438 }
439 impl<'a> _DbgIwdgStopW<'a> {
440 # [ doc = r" Writes raw `bits` to the field" ]
441 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
442 const MASK: u8 = 1;
443 const OFFSET: u8 = 12;
444 self.register.bits &= !((MASK as u32) << OFFSET);
445 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
446 self.register
447 }
448 }
449 # [ doc = r" Proxy" ]
450 pub struct _I2c1SmbusTimeoutW<'a> {
451 register: &'a mut W,
452 }
453 impl<'a> _I2c1SmbusTimeoutW<'a> {
454 # [ doc = r" Writes raw `bits` to the field" ]
455 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
456 const MASK: u8 = 1;
457 const OFFSET: u8 = 21;
458 self.register.bits &= !((MASK as u32) << OFFSET);
459 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
460 self.register
461 }
462 }
463 impl R {
464 # [ doc = r" Value of the register as raw bits" ]
465 pub fn bits(&self) -> u32 {
466 self.bits
467 }
468 fn _dbg_timer2_stop(&self) -> u8 {
469 const MASK: u8 = 1;
470 const OFFSET: u8 = 0;
471 ((self.bits >> OFFSET) & MASK as u32) as u8
472 }
473 # [ doc = "Bit 0 - Debug Timer 2 stopped when Core is halted" ]
474 pub fn dbg_timer2_stop(&self) -> DbgTimer2StopR {
475 DbgTimer2StopR { bits: self._dbg_timer2_stop() }
476 }
477 fn _dbg_timer3_stop(&self) -> u8 {
478 const MASK: u8 = 1;
479 const OFFSET: u8 = 1;
480 ((self.bits >> OFFSET) & MASK as u32) as u8
481 }
482 # [ doc = "Bit 1 - Debug Timer 3 stopped when Core is halted" ]
483 pub fn dbg_timer3_stop(&self) -> DbgTimer3StopR {
484 DbgTimer3StopR { bits: self._dbg_timer3_stop() }
485 }
486 fn _dbg_timer6_stop(&self) -> u8 {
487 const MASK: u8 = 1;
488 const OFFSET: u8 = 4;
489 ((self.bits >> OFFSET) & MASK as u32) as u8
490 }
491 # [ doc = "Bit 4 - Debug Timer 6 stopped when Core is halted" ]
492 pub fn dbg_timer6_stop(&self) -> DbgTimer6StopR {
493 DbgTimer6StopR { bits: self._dbg_timer6_stop() }
494 }
495 fn _dbg_timer14_stop(&self) -> u8 {
496 const MASK: u8 = 1;
497 const OFFSET: u8 = 8;
498 ((self.bits >> OFFSET) & MASK as u32) as u8
499 }
500 # [ doc = "Bit 8 - Debug Timer 14 stopped when Core is halted" ]
501 pub fn dbg_timer14_stop(&self) -> DbgTimer14StopR {
502 DbgTimer14StopR { bits: self._dbg_timer14_stop() }
503 }
504 fn _dbg_rtc_stop(&self) -> u8 {
505 const MASK: u8 = 1;
506 const OFFSET: u8 = 10;
507 ((self.bits >> OFFSET) & MASK as u32) as u8
508 }
509 # [ doc = "Bit 10 - Debug RTC stopped when Core is halted" ]
510 pub fn dbg_rtc_stop(&self) -> DbgRtcStopR {
511 DbgRtcStopR { bits: self._dbg_rtc_stop() }
512 }
513 fn _dbg_wwdg_stop(&self) -> u8 {
514 const MASK: u8 = 1;
515 const OFFSET: u8 = 11;
516 ((self.bits >> OFFSET) & MASK as u32) as u8
517 }
518 # [ doc = "Bit 11 - Debug Window Wachdog stopped when Core is halted" ]
519 pub fn dbg_wwdg_stop(&self) -> DbgWwdgStopR {
520 DbgWwdgStopR { bits: self._dbg_wwdg_stop() }
521 }
522 fn _dbg_iwdg_stop(&self) -> u8 {
523 const MASK: u8 = 1;
524 const OFFSET: u8 = 12;
525 ((self.bits >> OFFSET) & MASK as u32) as u8
526 }
527 # [ doc = "Bit 12 - Debug Independent Wachdog stopped when Core is halted" ]
528 pub fn dbg_iwdg_stop(&self) -> DbgIwdgStopR {
529 DbgIwdgStopR { bits: self._dbg_iwdg_stop() }
530 }
531 fn _i2c1_smbus_timeout(&self) -> u8 {
532 const MASK: u8 = 1;
533 const OFFSET: u8 = 21;
534 ((self.bits >> OFFSET) & MASK as u32) as u8
535 }
536 # [ doc = "Bit 21 - SMBUS timeout mode stopped when Core is halted" ]
537 pub fn i2c1_smbus_timeout(&self) -> I2c1SmbusTimeoutR {
538 I2c1SmbusTimeoutR { bits: self._i2c1_smbus_timeout() }
539 }
540 }
541 impl W {
542 # [ doc = r" Reset value of the register" ]
543 pub fn reset_value() -> W {
544 W { bits: 0 }
545 }
546 # [ doc = r" Writes raw `bits` to the register" ]
547 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
548 self.bits = bits;
549 self
550 }
551 # [ doc = "Bit 0 - Debug Timer 2 stopped when Core is halted" ]
552 pub fn dbg_timer2_stop(&mut self) -> _DbgTimer2StopW {
553 _DbgTimer2StopW { register: self }
554 }
555 # [ doc = "Bit 1 - Debug Timer 3 stopped when Core is halted" ]
556 pub fn dbg_timer3_stop(&mut self) -> _DbgTimer3StopW {
557 _DbgTimer3StopW { register: self }
558 }
559 # [ doc = "Bit 4 - Debug Timer 6 stopped when Core is halted" ]
560 pub fn dbg_timer6_stop(&mut self) -> _DbgTimer6StopW {
561 _DbgTimer6StopW { register: self }
562 }
563 # [ doc = "Bit 8 - Debug Timer 14 stopped when Core is halted" ]
564 pub fn dbg_timer14_stop(&mut self) -> _DbgTimer14StopW {
565 _DbgTimer14StopW { register: self }
566 }
567 # [ doc = "Bit 10 - Debug RTC stopped when Core is halted" ]
568 pub fn dbg_rtc_stop(&mut self) -> _DbgRtcStopW {
569 _DbgRtcStopW { register: self }
570 }
571 # [ doc = "Bit 11 - Debug Window Wachdog stopped when Core is halted" ]
572 pub fn dbg_wwdg_stop(&mut self) -> _DbgWwdgStopW {
573 _DbgWwdgStopW { register: self }
574 }
575 # [ doc = "Bit 12 - Debug Independent Wachdog stopped when Core is halted" ]
576 pub fn dbg_iwdg_stop(&mut self) -> _DbgIwdgStopW {
577 _DbgIwdgStopW { register: self }
578 }
579 # [ doc = "Bit 21 - SMBUS timeout mode stopped when Core is halted" ]
580 pub fn i2c1_smbus_timeout(&mut self) -> _I2c1SmbusTimeoutW {
581 _I2c1SmbusTimeoutW { register: self }
582 }
583 }
584}
585
586# [ doc = "APB High Freeze Register" ]
587# [ repr ( C ) ]
588pub struct Apbhfz {
589 register: ::volatile_register::RW<u32>,
590}
591
592# [ doc = "APB High Freeze Register" ]
593pub mod apbhfz {
594 # [ doc = r" Value read from the register" ]
595 pub struct R {
596 bits: u32,
597 }
598 # [ doc = r" Value to write to the register" ]
599 pub struct W {
600 bits: u32,
601 }
602 impl super::Apbhfz {
603 # [ doc = r" Modifies the contents of the register" ]
604 pub fn modify<F>(&mut self, f: F)
605 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
606 {
607 let bits = self.register.read();
608 let r = R { bits: bits };
609 let mut w = W { bits: bits };
610 f(&r, &mut w);
611 self.register.write(w.bits);
612 }
613 # [ doc = r" Reads the contents of the register" ]
614 pub fn read(&self) -> R {
615 R { bits: self.register.read() }
616 }
617 # [ doc = r" Writes to the register" ]
618 pub fn write<F>(&mut self, f: F)
619 where F: FnOnce(&mut W) -> &mut W
620 {
621 let mut w = W::reset_value();
622 f(&mut w);
623 self.register.write(w.bits);
624 }
625 }
626 # [ doc = "Value of the field DBG_TIMER1_STOP" ]
627 pub struct DbgTimer1StopR {
628 bits: u8,
629 }
630 impl DbgTimer1StopR {
631 # [ doc = r" Value of the field as raw bits" ]
632 pub fn bits(&self) -> u8 {
633 self.bits
634 }
635 }
636 # [ doc = "Value of the field DBG_TIMER15_STO" ]
637 pub struct DbgTimer15StoR {
638 bits: u8,
639 }
640 impl DbgTimer15StoR {
641 # [ doc = r" Value of the field as raw bits" ]
642 pub fn bits(&self) -> u8 {
643 self.bits
644 }
645 }
646 # [ doc = "Value of the field DBG_TIMER16_STO" ]
647 pub struct DbgTimer16StoR {
648 bits: u8,
649 }
650 impl DbgTimer16StoR {
651 # [ doc = r" Value of the field as raw bits" ]
652 pub fn bits(&self) -> u8 {
653 self.bits
654 }
655 }
656 # [ doc = "Value of the field DBG_TIMER17_STO" ]
657 pub struct DbgTimer17StoR {
658 bits: u8,
659 }
660 impl DbgTimer17StoR {
661 # [ doc = r" Value of the field as raw bits" ]
662 pub fn bits(&self) -> u8 {
663 self.bits
664 }
665 }
666 # [ doc = r" Proxy" ]
667 pub struct _DbgTimer1StopW<'a> {
668 register: &'a mut W,
669 }
670 impl<'a> _DbgTimer1StopW<'a> {
671 # [ doc = r" Writes raw `bits` to the field" ]
672 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
673 const MASK: u8 = 1;
674 const OFFSET: u8 = 11;
675 self.register.bits &= !((MASK as u32) << OFFSET);
676 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
677 self.register
678 }
679 }
680 # [ doc = r" Proxy" ]
681 pub struct _DbgTimer15StoW<'a> {
682 register: &'a mut W,
683 }
684 impl<'a> _DbgTimer15StoW<'a> {
685 # [ doc = r" Writes raw `bits` to the field" ]
686 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
687 const MASK: u8 = 1;
688 const OFFSET: u8 = 16;
689 self.register.bits &= !((MASK as u32) << OFFSET);
690 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
691 self.register
692 }
693 }
694 # [ doc = r" Proxy" ]
695 pub struct _DbgTimer16StoW<'a> {
696 register: &'a mut W,
697 }
698 impl<'a> _DbgTimer16StoW<'a> {
699 # [ doc = r" Writes raw `bits` to the field" ]
700 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
701 const MASK: u8 = 1;
702 const OFFSET: u8 = 17;
703 self.register.bits &= !((MASK as u32) << OFFSET);
704 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
705 self.register
706 }
707 }
708 # [ doc = r" Proxy" ]
709 pub struct _DbgTimer17StoW<'a> {
710 register: &'a mut W,
711 }
712 impl<'a> _DbgTimer17StoW<'a> {
713 # [ doc = r" Writes raw `bits` to the field" ]
714 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
715 const MASK: u8 = 1;
716 const OFFSET: u8 = 18;
717 self.register.bits &= !((MASK as u32) << OFFSET);
718 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
719 self.register
720 }
721 }
722 impl R {
723 # [ doc = r" Value of the register as raw bits" ]
724 pub fn bits(&self) -> u32 {
725 self.bits
726 }
727 fn _dbg_timer1_stop(&self) -> u8 {
728 const MASK: u8 = 1;
729 const OFFSET: u8 = 11;
730 ((self.bits >> OFFSET) & MASK as u32) as u8
731 }
732 # [ doc = "Bit 11 - Debug Timer 1 stopped when Core is halted" ]
733 pub fn dbg_timer1_stop(&self) -> DbgTimer1StopR {
734 DbgTimer1StopR { bits: self._dbg_timer1_stop() }
735 }
736 fn _dbg_timer15_sto(&self) -> u8 {
737 const MASK: u8 = 1;
738 const OFFSET: u8 = 16;
739 ((self.bits >> OFFSET) & MASK as u32) as u8
740 }
741 # [ doc = "Bit 16 - Debug Timer 15 stopped when Core is halted" ]
742 pub fn dbg_timer15_sto(&self) -> DbgTimer15StoR {
743 DbgTimer15StoR { bits: self._dbg_timer15_sto() }
744 }
745 fn _dbg_timer16_sto(&self) -> u8 {
746 const MASK: u8 = 1;
747 const OFFSET: u8 = 17;
748 ((self.bits >> OFFSET) & MASK as u32) as u8
749 }
750 # [ doc = "Bit 17 - Debug Timer 16 stopped when Core is halted" ]
751 pub fn dbg_timer16_sto(&self) -> DbgTimer16StoR {
752 DbgTimer16StoR { bits: self._dbg_timer16_sto() }
753 }
754 fn _dbg_timer17_sto(&self) -> u8 {
755 const MASK: u8 = 1;
756 const OFFSET: u8 = 18;
757 ((self.bits >> OFFSET) & MASK as u32) as u8
758 }
759 # [ doc = "Bit 18 - Debug Timer 17 stopped when Core is halted" ]
760 pub fn dbg_timer17_sto(&self) -> DbgTimer17StoR {
761 DbgTimer17StoR { bits: self._dbg_timer17_sto() }
762 }
763 }
764 impl W {
765 # [ doc = r" Reset value of the register" ]
766 pub fn reset_value() -> W {
767 W { bits: 0 }
768 }
769 # [ doc = r" Writes raw `bits` to the register" ]
770 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
771 self.bits = bits;
772 self
773 }
774 # [ doc = "Bit 11 - Debug Timer 1 stopped when Core is halted" ]
775 pub fn dbg_timer1_stop(&mut self) -> _DbgTimer1StopW {
776 _DbgTimer1StopW { register: self }
777 }
778 # [ doc = "Bit 16 - Debug Timer 15 stopped when Core is halted" ]
779 pub fn dbg_timer15_sto(&mut self) -> _DbgTimer15StoW {
780 _DbgTimer15StoW { register: self }
781 }
782 # [ doc = "Bit 17 - Debug Timer 16 stopped when Core is halted" ]
783 pub fn dbg_timer16_sto(&mut self) -> _DbgTimer16StoW {
784 _DbgTimer16StoW { register: self }
785 }
786 # [ doc = "Bit 18 - Debug Timer 17 stopped when Core is halted" ]
787 pub fn dbg_timer17_sto(&mut self) -> _DbgTimer17StoW {
788 _DbgTimer17StoW { register: self }
789 }
790 }
791}