1# ! [ doc = "Basic-timers" ]
2# [ doc = r" Register block" ]
3# [ repr ( C ) ]
4pub struct BTim {
5 # [ doc = "0x00 - control register 1" ]
6 pub cr1: Cr1,
7 # [ doc = "0x04 - control register 2" ]
8 pub cr2: Cr2,
9 _reserved0: [u8; 4usize],
10 # [ doc = "0x0c - DMA/Interrupt enable register" ]
11 pub dier: Dier,
12 # [ doc = "0x10 - status register" ]
13 pub sr: Sr,
14 # [ doc = "0x14 - event generation register" ]
15 pub egr: Egr,
16 _reserved1: [u8; 12usize],
17 # [ doc = "0x24 - counter" ]
18 pub cnt: Cnt,
19 # [ doc = "0x28 - prescaler" ]
20 pub psc: Psc,
21 # [ doc = "0x2c - auto-reload register" ]
22 pub arr: Arr,
23}
24
25# [ doc = "control register 1" ]
26# [ repr ( C ) ]
27pub struct Cr1 {
28 register: ::volatile_register::RW<u32>,
29}
30
31# [ doc = "control register 1" ]
32pub mod cr1 {
33 # [ doc = r" Value read from the register" ]
34 pub struct R {
35 bits: u32,
36 }
37 # [ doc = r" Value to write to the register" ]
38 pub struct W {
39 bits: u32,
40 }
41 impl super::Cr1 {
42 # [ doc = r" Modifies the contents of the register" ]
43 pub fn modify<F>(&mut self, f: F)
44 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
45 {
46 let bits = self.register.read();
47 let r = R { bits: bits };
48 let mut w = W { bits: bits };
49 f(&r, &mut w);
50 self.register.write(w.bits);
51 }
52 # [ doc = r" Reads the contents of the register" ]
53 pub fn read(&self) -> R {
54 R { bits: self.register.read() }
55 }
56 # [ doc = r" Writes to the register" ]
57 pub fn write<F>(&mut self, f: F)
58 where F: FnOnce(&mut W) -> &mut W
59 {
60 let mut w = W::reset_value();
61 f(&mut w);
62 self.register.write(w.bits);
63 }
64 }
65 # [ doc = "Value of the field ARPE" ]
66 pub struct ArpeR {
67 bits: u8,
68 }
69 impl ArpeR {
70 # [ doc = r" Value of the field as raw bits" ]
71 pub fn bits(&self) -> u8 {
72 self.bits
73 }
74 }
75 # [ doc = "Value of the field OPM" ]
76 pub struct OpmR {
77 bits: u8,
78 }
79 impl OpmR {
80 # [ doc = r" Value of the field as raw bits" ]
81 pub fn bits(&self) -> u8 {
82 self.bits
83 }
84 }
85 # [ doc = "Value of the field URS" ]
86 pub struct UrsR {
87 bits: u8,
88 }
89 impl UrsR {
90 # [ doc = r" Value of the field as raw bits" ]
91 pub fn bits(&self) -> u8 {
92 self.bits
93 }
94 }
95 # [ doc = "Value of the field UDIS" ]
96 pub struct UdisR {
97 bits: u8,
98 }
99 impl UdisR {
100 # [ doc = r" Value of the field as raw bits" ]
101 pub fn bits(&self) -> u8 {
102 self.bits
103 }
104 }
105 # [ doc = "Value of the field CEN" ]
106 pub struct CenR {
107 bits: u8,
108 }
109 impl CenR {
110 # [ doc = r" Value of the field as raw bits" ]
111 pub fn bits(&self) -> u8 {
112 self.bits
113 }
114 }
115 # [ doc = r" Proxy" ]
116 pub struct _ArpeW<'a> {
117 register: &'a mut W,
118 }
119 impl<'a> _ArpeW<'a> {
120 # [ doc = r" Writes raw `bits` to the field" ]
121 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
122 const MASK: u8 = 1;
123 const OFFSET: u8 = 7;
124 self.register.bits &= !((MASK as u32) << OFFSET);
125 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
126 self.register
127 }
128 }
129 # [ doc = r" Proxy" ]
130 pub struct _OpmW<'a> {
131 register: &'a mut W,
132 }
133 impl<'a> _OpmW<'a> {
134 # [ doc = r" Writes raw `bits` to the field" ]
135 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
136 const MASK: u8 = 1;
137 const OFFSET: u8 = 3;
138 self.register.bits &= !((MASK as u32) << OFFSET);
139 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
140 self.register
141 }
142 }
143 # [ doc = r" Proxy" ]
144 pub struct _UrsW<'a> {
145 register: &'a mut W,
146 }
147 impl<'a> _UrsW<'a> {
148 # [ doc = r" Writes raw `bits` to the field" ]
149 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
150 const MASK: u8 = 1;
151 const OFFSET: u8 = 2;
152 self.register.bits &= !((MASK as u32) << OFFSET);
153 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
154 self.register
155 }
156 }
157 # [ doc = r" Proxy" ]
158 pub struct _UdisW<'a> {
159 register: &'a mut W,
160 }
161 impl<'a> _UdisW<'a> {
162 # [ doc = r" Writes raw `bits` to the field" ]
163 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
164 const MASK: u8 = 1;
165 const OFFSET: u8 = 1;
166 self.register.bits &= !((MASK as u32) << OFFSET);
167 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
168 self.register
169 }
170 }
171 # [ doc = r" Proxy" ]
172 pub struct _CenW<'a> {
173 register: &'a mut W,
174 }
175 impl<'a> _CenW<'a> {
176 # [ doc = r" Writes raw `bits` to the field" ]
177 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
178 const MASK: u8 = 1;
179 const OFFSET: u8 = 0;
180 self.register.bits &= !((MASK as u32) << OFFSET);
181 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
182 self.register
183 }
184 }
185 impl R {
186 # [ doc = r" Value of the register as raw bits" ]
187 pub fn bits(&self) -> u32 {
188 self.bits
189 }
190 fn _arpe(&self) -> u8 {
191 const MASK: u8 = 1;
192 const OFFSET: u8 = 7;
193 ((self.bits >> OFFSET) & MASK as u32) as u8
194 }
195 # [ doc = "Bit 7 - Auto-reload preload enable" ]
196 pub fn arpe(&self) -> ArpeR {
197 ArpeR { bits: self._arpe() }
198 }
199 fn _opm(&self) -> u8 {
200 const MASK: u8 = 1;
201 const OFFSET: u8 = 3;
202 ((self.bits >> OFFSET) & MASK as u32) as u8
203 }
204 # [ doc = "Bit 3 - One-pulse mode" ]
205 pub fn opm(&self) -> OpmR {
206 OpmR { bits: self._opm() }
207 }
208 fn _urs(&self) -> u8 {
209 const MASK: u8 = 1;
210 const OFFSET: u8 = 2;
211 ((self.bits >> OFFSET) & MASK as u32) as u8
212 }
213 # [ doc = "Bit 2 - Update request source" ]
214 pub fn urs(&self) -> UrsR {
215 UrsR { bits: self._urs() }
216 }
217 fn _udis(&self) -> u8 {
218 const MASK: u8 = 1;
219 const OFFSET: u8 = 1;
220 ((self.bits >> OFFSET) & MASK as u32) as u8
221 }
222 # [ doc = "Bit 1 - Update disable" ]
223 pub fn udis(&self) -> UdisR {
224 UdisR { bits: self._udis() }
225 }
226 fn _cen(&self) -> u8 {
227 const MASK: u8 = 1;
228 const OFFSET: u8 = 0;
229 ((self.bits >> OFFSET) & MASK as u32) as u8
230 }
231 # [ doc = "Bit 0 - Counter enable" ]
232 pub fn cen(&self) -> CenR {
233 CenR { bits: self._cen() }
234 }
235 }
236 impl W {
237 # [ doc = r" Reset value of the register" ]
238 pub fn reset_value() -> W {
239 W { bits: 0 }
240 }
241 # [ doc = r" Writes raw `bits` to the register" ]
242 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
243 self.bits = bits;
244 self
245 }
246 # [ doc = "Bit 7 - Auto-reload preload enable" ]
247 pub fn arpe(&mut self) -> _ArpeW {
248 _ArpeW { register: self }
249 }
250 # [ doc = "Bit 3 - One-pulse mode" ]
251 pub fn opm(&mut self) -> _OpmW {
252 _OpmW { register: self }
253 }
254 # [ doc = "Bit 2 - Update request source" ]
255 pub fn urs(&mut self) -> _UrsW {
256 _UrsW { register: self }
257 }
258 # [ doc = "Bit 1 - Update disable" ]
259 pub fn udis(&mut self) -> _UdisW {
260 _UdisW { register: self }
261 }
262 # [ doc = "Bit 0 - Counter enable" ]
263 pub fn cen(&mut self) -> _CenW {
264 _CenW { register: self }
265 }
266 }
267}
268
269# [ doc = "control register 2" ]
270# [ repr ( C ) ]
271pub struct Cr2 {
272 register: ::volatile_register::RW<u32>,
273}
274
275# [ doc = "control register 2" ]
276pub mod cr2 {
277 # [ doc = r" Value read from the register" ]
278 pub struct R {
279 bits: u32,
280 }
281 # [ doc = r" Value to write to the register" ]
282 pub struct W {
283 bits: u32,
284 }
285 impl super::Cr2 {
286 # [ doc = r" Modifies the contents of the register" ]
287 pub fn modify<F>(&mut self, f: F)
288 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
289 {
290 let bits = self.register.read();
291 let r = R { bits: bits };
292 let mut w = W { bits: bits };
293 f(&r, &mut w);
294 self.register.write(w.bits);
295 }
296 # [ doc = r" Reads the contents of the register" ]
297 pub fn read(&self) -> R {
298 R { bits: self.register.read() }
299 }
300 # [ doc = r" Writes to the register" ]
301 pub fn write<F>(&mut self, f: F)
302 where F: FnOnce(&mut W) -> &mut W
303 {
304 let mut w = W::reset_value();
305 f(&mut w);
306 self.register.write(w.bits);
307 }
308 }
309 # [ doc = "Value of the field MMS" ]
310 pub struct MmsR {
311 bits: u8,
312 }
313 impl MmsR {
314 # [ doc = r" Value of the field as raw bits" ]
315 pub fn bits(&self) -> u8 {
316 self.bits
317 }
318 }
319 # [ doc = r" Proxy" ]
320 pub struct _MmsW<'a> {
321 register: &'a mut W,
322 }
323 impl<'a> _MmsW<'a> {
324 # [ doc = r" Writes raw `bits` to the field" ]
325 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
326 const MASK: u8 = 7;
327 const OFFSET: u8 = 4;
328 self.register.bits &= !((MASK as u32) << OFFSET);
329 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
330 self.register
331 }
332 }
333 impl R {
334 # [ doc = r" Value of the register as raw bits" ]
335 pub fn bits(&self) -> u32 {
336 self.bits
337 }
338 fn _mms(&self) -> u8 {
339 const MASK: u8 = 7;
340 const OFFSET: u8 = 4;
341 ((self.bits >> OFFSET) & MASK as u32) as u8
342 }
343 # [ doc = "Bits 4:6 - Master mode selection" ]
344 pub fn mms(&self) -> MmsR {
345 MmsR { bits: self._mms() }
346 }
347 }
348 impl W {
349 # [ doc = r" Reset value of the register" ]
350 pub fn reset_value() -> W {
351 W { bits: 0 }
352 }
353 # [ doc = r" Writes raw `bits` to the register" ]
354 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
355 self.bits = bits;
356 self
357 }
358 # [ doc = "Bits 4:6 - Master mode selection" ]
359 pub fn mms(&mut self) -> _MmsW {
360 _MmsW { register: self }
361 }
362 }
363}
364
365# [ doc = "DMA/Interrupt enable register" ]
366# [ repr ( C ) ]
367pub struct Dier {
368 register: ::volatile_register::RW<u32>,
369}
370
371# [ doc = "DMA/Interrupt enable register" ]
372pub mod dier {
373 # [ doc = r" Value read from the register" ]
374 pub struct R {
375 bits: u32,
376 }
377 # [ doc = r" Value to write to the register" ]
378 pub struct W {
379 bits: u32,
380 }
381 impl super::Dier {
382 # [ doc = r" Modifies the contents of the register" ]
383 pub fn modify<F>(&mut self, f: F)
384 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
385 {
386 let bits = self.register.read();
387 let r = R { bits: bits };
388 let mut w = W { bits: bits };
389 f(&r, &mut w);
390 self.register.write(w.bits);
391 }
392 # [ doc = r" Reads the contents of the register" ]
393 pub fn read(&self) -> R {
394 R { bits: self.register.read() }
395 }
396 # [ doc = r" Writes to the register" ]
397 pub fn write<F>(&mut self, f: F)
398 where F: FnOnce(&mut W) -> &mut W
399 {
400 let mut w = W::reset_value();
401 f(&mut w);
402 self.register.write(w.bits);
403 }
404 }
405 # [ doc = "Value of the field UDE" ]
406 pub struct UdeR {
407 bits: u8,
408 }
409 impl UdeR {
410 # [ doc = r" Value of the field as raw bits" ]
411 pub fn bits(&self) -> u8 {
412 self.bits
413 }
414 }
415 # [ doc = "Value of the field UIE" ]
416 pub struct UieR {
417 bits: u8,
418 }
419 impl UieR {
420 # [ doc = r" Value of the field as raw bits" ]
421 pub fn bits(&self) -> u8 {
422 self.bits
423 }
424 }
425 # [ doc = r" Proxy" ]
426 pub struct _UdeW<'a> {
427 register: &'a mut W,
428 }
429 impl<'a> _UdeW<'a> {
430 # [ doc = r" Writes raw `bits` to the field" ]
431 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
432 const MASK: u8 = 1;
433 const OFFSET: u8 = 8;
434 self.register.bits &= !((MASK as u32) << OFFSET);
435 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
436 self.register
437 }
438 }
439 # [ doc = r" Proxy" ]
440 pub struct _UieW<'a> {
441 register: &'a mut W,
442 }
443 impl<'a> _UieW<'a> {
444 # [ doc = r" Writes raw `bits` to the field" ]
445 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
446 const MASK: u8 = 1;
447 const OFFSET: u8 = 0;
448 self.register.bits &= !((MASK as u32) << OFFSET);
449 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
450 self.register
451 }
452 }
453 impl R {
454 # [ doc = r" Value of the register as raw bits" ]
455 pub fn bits(&self) -> u32 {
456 self.bits
457 }
458 fn _ude(&self) -> u8 {
459 const MASK: u8 = 1;
460 const OFFSET: u8 = 8;
461 ((self.bits >> OFFSET) & MASK as u32) as u8
462 }
463 # [ doc = "Bit 8 - Update DMA request enable" ]
464 pub fn ude(&self) -> UdeR {
465 UdeR { bits: self._ude() }
466 }
467 fn _uie(&self) -> u8 {
468 const MASK: u8 = 1;
469 const OFFSET: u8 = 0;
470 ((self.bits >> OFFSET) & MASK as u32) as u8
471 }
472 # [ doc = "Bit 0 - Update interrupt enable" ]
473 pub fn uie(&self) -> UieR {
474 UieR { bits: self._uie() }
475 }
476 }
477 impl W {
478 # [ doc = r" Reset value of the register" ]
479 pub fn reset_value() -> W {
480 W { bits: 0 }
481 }
482 # [ doc = r" Writes raw `bits` to the register" ]
483 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
484 self.bits = bits;
485 self
486 }
487 # [ doc = "Bit 8 - Update DMA request enable" ]
488 pub fn ude(&mut self) -> _UdeW {
489 _UdeW { register: self }
490 }
491 # [ doc = "Bit 0 - Update interrupt enable" ]
492 pub fn uie(&mut self) -> _UieW {
493 _UieW { register: self }
494 }
495 }
496}
497
498# [ doc = "status register" ]
499# [ repr ( C ) ]
500pub struct Sr {
501 register: ::volatile_register::RW<u32>,
502}
503
504# [ doc = "status register" ]
505pub mod sr {
506 # [ doc = r" Value read from the register" ]
507 pub struct R {
508 bits: u32,
509 }
510 # [ doc = r" Value to write to the register" ]
511 pub struct W {
512 bits: u32,
513 }
514 impl super::Sr {
515 # [ doc = r" Modifies the contents of the register" ]
516 pub fn modify<F>(&mut self, f: F)
517 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
518 {
519 let bits = self.register.read();
520 let r = R { bits: bits };
521 let mut w = W { bits: bits };
522 f(&r, &mut w);
523 self.register.write(w.bits);
524 }
525 # [ doc = r" Reads the contents of the register" ]
526 pub fn read(&self) -> R {
527 R { bits: self.register.read() }
528 }
529 # [ doc = r" Writes to the register" ]
530 pub fn write<F>(&mut self, f: F)
531 where F: FnOnce(&mut W) -> &mut W
532 {
533 let mut w = W::reset_value();
534 f(&mut w);
535 self.register.write(w.bits);
536 }
537 }
538 # [ doc = "Value of the field UIF" ]
539 pub struct UifR {
540 bits: u8,
541 }
542 impl UifR {
543 # [ doc = r" Value of the field as raw bits" ]
544 pub fn bits(&self) -> u8 {
545 self.bits
546 }
547 }
548 # [ doc = r" Proxy" ]
549 pub struct _UifW<'a> {
550 register: &'a mut W,
551 }
552 impl<'a> _UifW<'a> {
553 # [ doc = r" Writes raw `bits` to the field" ]
554 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
555 const MASK: u8 = 1;
556 const OFFSET: u8 = 0;
557 self.register.bits &= !((MASK as u32) << OFFSET);
558 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
559 self.register
560 }
561 }
562 impl R {
563 # [ doc = r" Value of the register as raw bits" ]
564 pub fn bits(&self) -> u32 {
565 self.bits
566 }
567 fn _uif(&self) -> u8 {
568 const MASK: u8 = 1;
569 const OFFSET: u8 = 0;
570 ((self.bits >> OFFSET) & MASK as u32) as u8
571 }
572 # [ doc = "Bit 0 - Update interrupt flag" ]
573 pub fn uif(&self) -> UifR {
574 UifR { bits: self._uif() }
575 }
576 }
577 impl W {
578 # [ doc = r" Reset value of the register" ]
579 pub fn reset_value() -> W {
580 W { bits: 0 }
581 }
582 # [ doc = r" Writes raw `bits` to the register" ]
583 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
584 self.bits = bits;
585 self
586 }
587 # [ doc = "Bit 0 - Update interrupt flag" ]
588 pub fn uif(&mut self) -> _UifW {
589 _UifW { register: self }
590 }
591 }
592}
593
594# [ doc = "event generation register" ]
595# [ repr ( C ) ]
596pub struct Egr {
597 register: ::volatile_register::WO<u32>,
598}
599
600# [ doc = "event generation register" ]
601pub mod egr {
602 # [ doc = r" Value to write to the register" ]
603 pub struct W {
604 bits: u32,
605 }
606 impl super::Egr {
607 # [ doc = r" Writes to the register" ]
608 pub fn write<F>(&mut self, f: F)
609 where F: FnOnce(&mut W) -> &mut W
610 {
611 let mut w = W::reset_value();
612 f(&mut w);
613 self.register.write(w.bits);
614 }
615 }
616 # [ doc = r" Proxy" ]
617 pub struct _UgW<'a> {
618 register: &'a mut W,
619 }
620 impl<'a> _UgW<'a> {
621 # [ doc = r" Writes raw `bits` to the field" ]
622 pub unsafe fn bits(self, bits: u8) -> &'a mut W {
623 const MASK: u8 = 1;
624 const OFFSET: u8 = 0;
625 self.register.bits &= !((MASK as u32) << OFFSET);
626 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
627 self.register
628 }
629 }
630 impl W {
631 # [ doc = r" Reset value of the register" ]
632 pub fn reset_value() -> W {
633 W { bits: 0 }
634 }
635 # [ doc = r" Writes raw `bits` to the register" ]
636 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
637 self.bits = bits;
638 self
639 }
640 # [ doc = "Bit 0 - Update generation" ]
641 pub fn ug(&mut self) -> _UgW {
642 _UgW { register: self }
643 }
644 }
645}
646
647# [ doc = "counter" ]
648# [ repr ( C ) ]
649pub struct Cnt {
650 register: ::volatile_register::RW<u32>,
651}
652
653# [ doc = "counter" ]
654pub mod cnt {
655 # [ doc = r" Value read from the register" ]
656 pub struct R {
657 bits: u32,
658 }
659 # [ doc = r" Value to write to the register" ]
660 pub struct W {
661 bits: u32,
662 }
663 impl super::Cnt {
664 # [ doc = r" Modifies the contents of the register" ]
665 pub fn modify<F>(&mut self, f: F)
666 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
667 {
668 let bits = self.register.read();
669 let r = R { bits: bits };
670 let mut w = W { bits: bits };
671 f(&r, &mut w);
672 self.register.write(w.bits);
673 }
674 # [ doc = r" Reads the contents of the register" ]
675 pub fn read(&self) -> R {
676 R { bits: self.register.read() }
677 }
678 # [ doc = r" Writes to the register" ]
679 pub fn write<F>(&mut self, f: F)
680 where F: FnOnce(&mut W) -> &mut W
681 {
682 let mut w = W::reset_value();
683 f(&mut w);
684 self.register.write(w.bits);
685 }
686 }
687 # [ doc = "Value of the field CNT" ]
688 pub struct CntR {
689 bits: u16,
690 }
691 impl CntR {
692 # [ doc = r" Value of the field as raw bits" ]
693 pub fn bits(&self) -> u16 {
694 self.bits
695 }
696 }
697 # [ doc = r" Proxy" ]
698 pub struct _CntW<'a> {
699 register: &'a mut W,
700 }
701 impl<'a> _CntW<'a> {
702 # [ doc = r" Writes raw `bits` to the field" ]
703 pub unsafe fn bits(self, bits: u16) -> &'a mut W {
704 const MASK: u16 = 65535;
705 const OFFSET: u8 = 0;
706 self.register.bits &= !((MASK as u32) << OFFSET);
707 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
708 self.register
709 }
710 }
711 impl R {
712 # [ doc = r" Value of the register as raw bits" ]
713 pub fn bits(&self) -> u32 {
714 self.bits
715 }
716 fn _cnt(&self) -> u16 {
717 const MASK: u16 = 65535;
718 const OFFSET: u8 = 0;
719 ((self.bits >> OFFSET) & MASK as u32) as u16
720 }
721 # [ doc = "Bits 0:15 - Low counter value" ]
722 pub fn cnt(&self) -> CntR {
723 CntR { bits: self._cnt() }
724 }
725 }
726 impl W {
727 # [ doc = r" Reset value of the register" ]
728 pub fn reset_value() -> W {
729 W { bits: 0 }
730 }
731 # [ doc = r" Writes raw `bits` to the register" ]
732 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
733 self.bits = bits;
734 self
735 }
736 # [ doc = "Bits 0:15 - Low counter value" ]
737 pub fn cnt(&mut self) -> _CntW {
738 _CntW { register: self }
739 }
740 }
741}
742
743# [ doc = "prescaler" ]
744# [ repr ( C ) ]
745pub struct Psc {
746 register: ::volatile_register::RW<u32>,
747}
748
749# [ doc = "prescaler" ]
750pub mod psc {
751 # [ doc = r" Value read from the register" ]
752 pub struct R {
753 bits: u32,
754 }
755 # [ doc = r" Value to write to the register" ]
756 pub struct W {
757 bits: u32,
758 }
759 impl super::Psc {
760 # [ doc = r" Modifies the contents of the register" ]
761 pub fn modify<F>(&mut self, f: F)
762 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
763 {
764 let bits = self.register.read();
765 let r = R { bits: bits };
766 let mut w = W { bits: bits };
767 f(&r, &mut w);
768 self.register.write(w.bits);
769 }
770 # [ doc = r" Reads the contents of the register" ]
771 pub fn read(&self) -> R {
772 R { bits: self.register.read() }
773 }
774 # [ doc = r" Writes to the register" ]
775 pub fn write<F>(&mut self, f: F)
776 where F: FnOnce(&mut W) -> &mut W
777 {
778 let mut w = W::reset_value();
779 f(&mut w);
780 self.register.write(w.bits);
781 }
782 }
783 # [ doc = "Value of the field PSC" ]
784 pub struct PscR {
785 bits: u16,
786 }
787 impl PscR {
788 # [ doc = r" Value of the field as raw bits" ]
789 pub fn bits(&self) -> u16 {
790 self.bits
791 }
792 }
793 # [ doc = r" Proxy" ]
794 pub struct _PscW<'a> {
795 register: &'a mut W,
796 }
797 impl<'a> _PscW<'a> {
798 # [ doc = r" Writes raw `bits` to the field" ]
799 pub unsafe fn bits(self, bits: u16) -> &'a mut W {
800 const MASK: u16 = 65535;
801 const OFFSET: u8 = 0;
802 self.register.bits &= !((MASK as u32) << OFFSET);
803 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
804 self.register
805 }
806 }
807 impl R {
808 # [ doc = r" Value of the register as raw bits" ]
809 pub fn bits(&self) -> u32 {
810 self.bits
811 }
812 fn _psc(&self) -> u16 {
813 const MASK: u16 = 65535;
814 const OFFSET: u8 = 0;
815 ((self.bits >> OFFSET) & MASK as u32) as u16
816 }
817 # [ doc = "Bits 0:15 - Prescaler value" ]
818 pub fn psc(&self) -> PscR {
819 PscR { bits: self._psc() }
820 }
821 }
822 impl W {
823 # [ doc = r" Reset value of the register" ]
824 pub fn reset_value() -> W {
825 W { bits: 0 }
826 }
827 # [ doc = r" Writes raw `bits` to the register" ]
828 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
829 self.bits = bits;
830 self
831 }
832 # [ doc = "Bits 0:15 - Prescaler value" ]
833 pub fn psc(&mut self) -> _PscW {
834 _PscW { register: self }
835 }
836 }
837}
838
839# [ doc = "auto-reload register" ]
840# [ repr ( C ) ]
841pub struct Arr {
842 register: ::volatile_register::RW<u32>,
843}
844
845# [ doc = "auto-reload register" ]
846pub mod arr {
847 # [ doc = r" Value read from the register" ]
848 pub struct R {
849 bits: u32,
850 }
851 # [ doc = r" Value to write to the register" ]
852 pub struct W {
853 bits: u32,
854 }
855 impl super::Arr {
856 # [ doc = r" Modifies the contents of the register" ]
857 pub fn modify<F>(&mut self, f: F)
858 where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W
859 {
860 let bits = self.register.read();
861 let r = R { bits: bits };
862 let mut w = W { bits: bits };
863 f(&r, &mut w);
864 self.register.write(w.bits);
865 }
866 # [ doc = r" Reads the contents of the register" ]
867 pub fn read(&self) -> R {
868 R { bits: self.register.read() }
869 }
870 # [ doc = r" Writes to the register" ]
871 pub fn write<F>(&mut self, f: F)
872 where F: FnOnce(&mut W) -> &mut W
873 {
874 let mut w = W::reset_value();
875 f(&mut w);
876 self.register.write(w.bits);
877 }
878 }
879 # [ doc = "Value of the field ARR" ]
880 pub struct ArrR {
881 bits: u16,
882 }
883 impl ArrR {
884 # [ doc = r" Value of the field as raw bits" ]
885 pub fn bits(&self) -> u16 {
886 self.bits
887 }
888 }
889 # [ doc = r" Proxy" ]
890 pub struct _ArrW<'a> {
891 register: &'a mut W,
892 }
893 impl<'a> _ArrW<'a> {
894 # [ doc = r" Writes raw `bits` to the field" ]
895 pub unsafe fn bits(self, bits: u16) -> &'a mut W {
896 const MASK: u16 = 65535;
897 const OFFSET: u8 = 0;
898 self.register.bits &= !((MASK as u32) << OFFSET);
899 self.register.bits |= ((bits & MASK) as u32) << OFFSET;
900 self.register
901 }
902 }
903 impl R {
904 # [ doc = r" Value of the register as raw bits" ]
905 pub fn bits(&self) -> u32 {
906 self.bits
907 }
908 fn _arr(&self) -> u16 {
909 const MASK: u16 = 65535;
910 const OFFSET: u8 = 0;
911 ((self.bits >> OFFSET) & MASK as u32) as u16
912 }
913 # [ doc = "Bits 0:15 - Low Auto-reload value" ]
914 pub fn arr(&self) -> ArrR {
915 ArrR { bits: self._arr() }
916 }
917 }
918 impl W {
919 # [ doc = r" Reset value of the register" ]
920 pub fn reset_value() -> W {
921 W { bits: 0 }
922 }
923 # [ doc = r" Writes raw `bits` to the register" ]
924 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
925 self.bits = bits;
926 self
927 }
928 # [ doc = "Bits 0:15 - Low Auto-reload value" ]
929 pub fn arr(&mut self) -> _ArrW {
930 _ArrW { register: self }
931 }
932 }
933}