stm32f0/stm32f0x2/usb/
istr.rs

1///Register `ISTR` reader
2pub type R = crate::R<ISTRrs>;
3///Register `ISTR` writer
4pub type W = crate::W<ISTRrs>;
5///Field `EP_ID` reader - Endpoint Identifier
6pub type EP_ID_R = crate::FieldReader;
7/**Direction of transaction
8
9Value on reset: 0*/
10#[cfg_attr(feature = "defmt", derive(defmt::Format))]
11#[derive(Clone, Copy, Debug, PartialEq, Eq)]
12pub enum DIR {
13    ///0: Data transmitted by the USB peripheral to the host PC
14    To = 0,
15    ///1: Data received by the USB peripheral from the host PC
16    From = 1,
17}
18impl From<DIR> for bool {
19    #[inline(always)]
20    fn from(variant: DIR) -> Self {
21        variant as u8 != 0
22    }
23}
24///Field `DIR` reader - Direction of transaction
25pub type DIR_R = crate::BitReader<DIR>;
26impl DIR_R {
27    ///Get enumerated values variant
28    #[inline(always)]
29    pub const fn variant(&self) -> DIR {
30        match self.bits {
31            false => DIR::To,
32            true => DIR::From,
33        }
34    }
35    ///Data transmitted by the USB peripheral to the host PC
36    #[inline(always)]
37    pub fn is_to(&self) -> bool {
38        *self == DIR::To
39    }
40    ///Data received by the USB peripheral from the host PC
41    #[inline(always)]
42    pub fn is_from(&self) -> bool {
43        *self == DIR::From
44    }
45}
46/**LPM L1 state request
47
48Value on reset: 0*/
49#[cfg_attr(feature = "defmt", derive(defmt::Format))]
50#[derive(Clone, Copy, Debug, PartialEq, Eq)]
51pub enum L1REQR {
52    ///0: LPM command to enter the L1 state is not received
53    NotReceived = 0,
54    ///1: LPM command to enter the L1 state is successfully received and acknowledged
55    Received = 1,
56}
57impl From<L1REQR> for bool {
58    #[inline(always)]
59    fn from(variant: L1REQR) -> Self {
60        variant as u8 != 0
61    }
62}
63///Field `L1REQ` reader - LPM L1 state request
64pub type L1REQ_R = crate::BitReader<L1REQR>;
65impl L1REQ_R {
66    ///Get enumerated values variant
67    #[inline(always)]
68    pub const fn variant(&self) -> L1REQR {
69        match self.bits {
70            false => L1REQR::NotReceived,
71            true => L1REQR::Received,
72        }
73    }
74    ///LPM command to enter the L1 state is not received
75    #[inline(always)]
76    pub fn is_not_received(&self) -> bool {
77        *self == L1REQR::NotReceived
78    }
79    ///LPM command to enter the L1 state is successfully received and acknowledged
80    #[inline(always)]
81    pub fn is_received(&self) -> bool {
82        *self == L1REQR::Received
83    }
84}
85/**LPM L1 state request
86
87Value on reset: 0*/
88#[cfg_attr(feature = "defmt", derive(defmt::Format))]
89#[derive(Clone, Copy, Debug, PartialEq, Eq)]
90pub enum L1REQW {
91    ///0: Clear flag
92    Clear = 0,
93}
94impl From<L1REQW> for bool {
95    #[inline(always)]
96    fn from(variant: L1REQW) -> Self {
97        variant as u8 != 0
98    }
99}
100///Field `L1REQ` writer - LPM L1 state request
101pub type L1REQ_W<'a, REG> = crate::BitWriter0C<'a, REG, L1REQW>;
102impl<'a, REG> L1REQ_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///Clear flag
107    #[inline(always)]
108    pub fn clear(self) -> &'a mut crate::W<REG> {
109        self.variant(L1REQW::Clear)
110    }
111}
112/**Expected start frame
113
114Value on reset: 0*/
115#[cfg_attr(feature = "defmt", derive(defmt::Format))]
116#[derive(Clone, Copy, Debug, PartialEq, Eq)]
117pub enum ESOFR {
118    ///0: NotExpectedStartOfFrame
119    NotExpectedStartOfFrame = 0,
120    ///1: An SOF packet is expected but not received
121    ExpectedStartOfFrame = 1,
122}
123impl From<ESOFR> for bool {
124    #[inline(always)]
125    fn from(variant: ESOFR) -> Self {
126        variant as u8 != 0
127    }
128}
129///Field `ESOF` reader - Expected start frame
130pub type ESOF_R = crate::BitReader<ESOFR>;
131impl ESOF_R {
132    ///Get enumerated values variant
133    #[inline(always)]
134    pub const fn variant(&self) -> ESOFR {
135        match self.bits {
136            false => ESOFR::NotExpectedStartOfFrame,
137            true => ESOFR::ExpectedStartOfFrame,
138        }
139    }
140    ///NotExpectedStartOfFrame
141    #[inline(always)]
142    pub fn is_not_expected_start_of_frame(&self) -> bool {
143        *self == ESOFR::NotExpectedStartOfFrame
144    }
145    ///An SOF packet is expected but not received
146    #[inline(always)]
147    pub fn is_expected_start_of_frame(&self) -> bool {
148        *self == ESOFR::ExpectedStartOfFrame
149    }
150}
151/**Expected start frame
152
153Value on reset: 0*/
154#[cfg_attr(feature = "defmt", derive(defmt::Format))]
155#[derive(Clone, Copy, Debug, PartialEq, Eq)]
156pub enum ESOFW {
157    ///0: Clear flag
158    Clear = 0,
159}
160impl From<ESOFW> for bool {
161    #[inline(always)]
162    fn from(variant: ESOFW) -> Self {
163        variant as u8 != 0
164    }
165}
166///Field `ESOF` writer - Expected start frame
167pub type ESOF_W<'a, REG> = crate::BitWriter0C<'a, REG, ESOFW>;
168impl<'a, REG> ESOF_W<'a, REG>
169where
170    REG: crate::Writable + crate::RegisterSpec,
171{
172    ///Clear flag
173    #[inline(always)]
174    pub fn clear(self) -> &'a mut crate::W<REG> {
175        self.variant(ESOFW::Clear)
176    }
177}
178/**start of frame
179
180Value on reset: 0*/
181#[cfg_attr(feature = "defmt", derive(defmt::Format))]
182#[derive(Clone, Copy, Debug, PartialEq, Eq)]
183pub enum SOFR {
184    ///0: NotStartOfFrame
185    NotStartOfFrame = 0,
186    ///1: Beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus
187    StartOfFrame = 1,
188}
189impl From<SOFR> for bool {
190    #[inline(always)]
191    fn from(variant: SOFR) -> Self {
192        variant as u8 != 0
193    }
194}
195///Field `SOF` reader - start of frame
196pub type SOF_R = crate::BitReader<SOFR>;
197impl SOF_R {
198    ///Get enumerated values variant
199    #[inline(always)]
200    pub const fn variant(&self) -> SOFR {
201        match self.bits {
202            false => SOFR::NotStartOfFrame,
203            true => SOFR::StartOfFrame,
204        }
205    }
206    ///NotStartOfFrame
207    #[inline(always)]
208    pub fn is_not_start_of_frame(&self) -> bool {
209        *self == SOFR::NotStartOfFrame
210    }
211    ///Beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus
212    #[inline(always)]
213    pub fn is_start_of_frame(&self) -> bool {
214        *self == SOFR::StartOfFrame
215    }
216}
217/**start of frame
218
219Value on reset: 0*/
220#[cfg_attr(feature = "defmt", derive(defmt::Format))]
221#[derive(Clone, Copy, Debug, PartialEq, Eq)]
222pub enum SOFW {
223    ///0: Clear flag
224    Clear = 0,
225}
226impl From<SOFW> for bool {
227    #[inline(always)]
228    fn from(variant: SOFW) -> Self {
229        variant as u8 != 0
230    }
231}
232///Field `SOF` writer - start of frame
233pub type SOF_W<'a, REG> = crate::BitWriter0C<'a, REG, SOFW>;
234impl<'a, REG> SOF_W<'a, REG>
235where
236    REG: crate::Writable + crate::RegisterSpec,
237{
238    ///Clear flag
239    #[inline(always)]
240    pub fn clear(self) -> &'a mut crate::W<REG> {
241        self.variant(SOFW::Clear)
242    }
243}
244/**reset request
245
246Value on reset: 0*/
247#[cfg_attr(feature = "defmt", derive(defmt::Format))]
248#[derive(Clone, Copy, Debug, PartialEq, Eq)]
249pub enum RESETR {
250    ///0: NotReset
251    NotReset = 0,
252    ///1: Peripheral detects an active USB RESET signal at its inputs
253    Reset = 1,
254}
255impl From<RESETR> for bool {
256    #[inline(always)]
257    fn from(variant: RESETR) -> Self {
258        variant as u8 != 0
259    }
260}
261///Field `RESET` reader - reset request
262pub type RESET_R = crate::BitReader<RESETR>;
263impl RESET_R {
264    ///Get enumerated values variant
265    #[inline(always)]
266    pub const fn variant(&self) -> RESETR {
267        match self.bits {
268            false => RESETR::NotReset,
269            true => RESETR::Reset,
270        }
271    }
272    ///NotReset
273    #[inline(always)]
274    pub fn is_not_reset(&self) -> bool {
275        *self == RESETR::NotReset
276    }
277    ///Peripheral detects an active USB RESET signal at its inputs
278    #[inline(always)]
279    pub fn is_reset(&self) -> bool {
280        *self == RESETR::Reset
281    }
282}
283/**reset request
284
285Value on reset: 0*/
286#[cfg_attr(feature = "defmt", derive(defmt::Format))]
287#[derive(Clone, Copy, Debug, PartialEq, Eq)]
288pub enum RESETW {
289    ///0: Clear flag
290    Clear = 0,
291}
292impl From<RESETW> for bool {
293    #[inline(always)]
294    fn from(variant: RESETW) -> Self {
295        variant as u8 != 0
296    }
297}
298///Field `RESET` writer - reset request
299pub type RESET_W<'a, REG> = crate::BitWriter0C<'a, REG, RESETW>;
300impl<'a, REG> RESET_W<'a, REG>
301where
302    REG: crate::Writable + crate::RegisterSpec,
303{
304    ///Clear flag
305    #[inline(always)]
306    pub fn clear(self) -> &'a mut crate::W<REG> {
307        self.variant(RESETW::Clear)
308    }
309}
310/**Suspend mode request
311
312Value on reset: 0*/
313#[cfg_attr(feature = "defmt", derive(defmt::Format))]
314#[derive(Clone, Copy, Debug, PartialEq, Eq)]
315pub enum SUSPR {
316    ///0: NotSuspend
317    NotSuspend = 0,
318    ///1: No traffic has been received for 3 ms, indicating a suspend mode request from the USB bus
319    Suspend = 1,
320}
321impl From<SUSPR> for bool {
322    #[inline(always)]
323    fn from(variant: SUSPR) -> Self {
324        variant as u8 != 0
325    }
326}
327///Field `SUSP` reader - Suspend mode request
328pub type SUSP_R = crate::BitReader<SUSPR>;
329impl SUSP_R {
330    ///Get enumerated values variant
331    #[inline(always)]
332    pub const fn variant(&self) -> SUSPR {
333        match self.bits {
334            false => SUSPR::NotSuspend,
335            true => SUSPR::Suspend,
336        }
337    }
338    ///NotSuspend
339    #[inline(always)]
340    pub fn is_not_suspend(&self) -> bool {
341        *self == SUSPR::NotSuspend
342    }
343    ///No traffic has been received for 3 ms, indicating a suspend mode request from the USB bus
344    #[inline(always)]
345    pub fn is_suspend(&self) -> bool {
346        *self == SUSPR::Suspend
347    }
348}
349/**Suspend mode request
350
351Value on reset: 0*/
352#[cfg_attr(feature = "defmt", derive(defmt::Format))]
353#[derive(Clone, Copy, Debug, PartialEq, Eq)]
354pub enum SUSPW {
355    ///0: Clear flag
356    Clear = 0,
357}
358impl From<SUSPW> for bool {
359    #[inline(always)]
360    fn from(variant: SUSPW) -> Self {
361        variant as u8 != 0
362    }
363}
364///Field `SUSP` writer - Suspend mode request
365pub type SUSP_W<'a, REG> = crate::BitWriter0C<'a, REG, SUSPW>;
366impl<'a, REG> SUSP_W<'a, REG>
367where
368    REG: crate::Writable + crate::RegisterSpec,
369{
370    ///Clear flag
371    #[inline(always)]
372    pub fn clear(self) -> &'a mut crate::W<REG> {
373        self.variant(SUSPW::Clear)
374    }
375}
376/**Wakeup
377
378Value on reset: 0*/
379#[cfg_attr(feature = "defmt", derive(defmt::Format))]
380#[derive(Clone, Copy, Debug, PartialEq, Eq)]
381pub enum WKUPR {
382    ///0: NotWakeup
383    NotWakeup = 0,
384    ///1: Activity is detected that wakes up the USB peripheral
385    Wakeup = 1,
386}
387impl From<WKUPR> for bool {
388    #[inline(always)]
389    fn from(variant: WKUPR) -> Self {
390        variant as u8 != 0
391    }
392}
393///Field `WKUP` reader - Wakeup
394pub type WKUP_R = crate::BitReader<WKUPR>;
395impl WKUP_R {
396    ///Get enumerated values variant
397    #[inline(always)]
398    pub const fn variant(&self) -> WKUPR {
399        match self.bits {
400            false => WKUPR::NotWakeup,
401            true => WKUPR::Wakeup,
402        }
403    }
404    ///NotWakeup
405    #[inline(always)]
406    pub fn is_not_wakeup(&self) -> bool {
407        *self == WKUPR::NotWakeup
408    }
409    ///Activity is detected that wakes up the USB peripheral
410    #[inline(always)]
411    pub fn is_wakeup(&self) -> bool {
412        *self == WKUPR::Wakeup
413    }
414}
415/**Wakeup
416
417Value on reset: 0*/
418#[cfg_attr(feature = "defmt", derive(defmt::Format))]
419#[derive(Clone, Copy, Debug, PartialEq, Eq)]
420pub enum WKUPW {
421    ///0: Clear flag
422    Clear = 0,
423}
424impl From<WKUPW> for bool {
425    #[inline(always)]
426    fn from(variant: WKUPW) -> Self {
427        variant as u8 != 0
428    }
429}
430///Field `WKUP` writer - Wakeup
431pub type WKUP_W<'a, REG> = crate::BitWriter0C<'a, REG, WKUPW>;
432impl<'a, REG> WKUP_W<'a, REG>
433where
434    REG: crate::Writable + crate::RegisterSpec,
435{
436    ///Clear flag
437    #[inline(always)]
438    pub fn clear(self) -> &'a mut crate::W<REG> {
439        self.variant(WKUPW::Clear)
440    }
441}
442/**Error
443
444Value on reset: 0*/
445#[cfg_attr(feature = "defmt", derive(defmt::Format))]
446#[derive(Clone, Copy, Debug, PartialEq, Eq)]
447pub enum ERRR {
448    ///0: Errors are not occurred
449    NotOverrun = 0,
450    ///1: One of No ANSwer, Cyclic Redundancy Check, Bit Stuffing or Framing format Violation error occurred
451    Error = 1,
452}
453impl From<ERRR> for bool {
454    #[inline(always)]
455    fn from(variant: ERRR) -> Self {
456        variant as u8 != 0
457    }
458}
459///Field `ERR` reader - Error
460pub type ERR_R = crate::BitReader<ERRR>;
461impl ERR_R {
462    ///Get enumerated values variant
463    #[inline(always)]
464    pub const fn variant(&self) -> ERRR {
465        match self.bits {
466            false => ERRR::NotOverrun,
467            true => ERRR::Error,
468        }
469    }
470    ///Errors are not occurred
471    #[inline(always)]
472    pub fn is_not_overrun(&self) -> bool {
473        *self == ERRR::NotOverrun
474    }
475    ///One of No ANSwer, Cyclic Redundancy Check, Bit Stuffing or Framing format Violation error occurred
476    #[inline(always)]
477    pub fn is_error(&self) -> bool {
478        *self == ERRR::Error
479    }
480}
481/**Error
482
483Value on reset: 0*/
484#[cfg_attr(feature = "defmt", derive(defmt::Format))]
485#[derive(Clone, Copy, Debug, PartialEq, Eq)]
486pub enum ERRW {
487    ///0: Clear flag
488    Clear = 0,
489}
490impl From<ERRW> for bool {
491    #[inline(always)]
492    fn from(variant: ERRW) -> Self {
493        variant as u8 != 0
494    }
495}
496///Field `ERR` writer - Error
497pub type ERR_W<'a, REG> = crate::BitWriter0C<'a, REG, ERRW>;
498impl<'a, REG> ERR_W<'a, REG>
499where
500    REG: crate::Writable + crate::RegisterSpec,
501{
502    ///Clear flag
503    #[inline(always)]
504    pub fn clear(self) -> &'a mut crate::W<REG> {
505        self.variant(ERRW::Clear)
506    }
507}
508/**Packet memory area over / underrun
509
510Value on reset: 0*/
511#[cfg_attr(feature = "defmt", derive(defmt::Format))]
512#[derive(Clone, Copy, Debug, PartialEq, Eq)]
513pub enum PMAOVRR {
514    ///0: Overrun is not occurred
515    NotOverrun = 0,
516    ///1: Microcontroller has not been able to respond in time to an USB memory request
517    Overrun = 1,
518}
519impl From<PMAOVRR> for bool {
520    #[inline(always)]
521    fn from(variant: PMAOVRR) -> Self {
522        variant as u8 != 0
523    }
524}
525///Field `PMAOVR` reader - Packet memory area over / underrun
526pub type PMAOVR_R = crate::BitReader<PMAOVRR>;
527impl PMAOVR_R {
528    ///Get enumerated values variant
529    #[inline(always)]
530    pub const fn variant(&self) -> PMAOVRR {
531        match self.bits {
532            false => PMAOVRR::NotOverrun,
533            true => PMAOVRR::Overrun,
534        }
535    }
536    ///Overrun is not occurred
537    #[inline(always)]
538    pub fn is_not_overrun(&self) -> bool {
539        *self == PMAOVRR::NotOverrun
540    }
541    ///Microcontroller has not been able to respond in time to an USB memory request
542    #[inline(always)]
543    pub fn is_overrun(&self) -> bool {
544        *self == PMAOVRR::Overrun
545    }
546}
547/**Packet memory area over / underrun
548
549Value on reset: 0*/
550#[cfg_attr(feature = "defmt", derive(defmt::Format))]
551#[derive(Clone, Copy, Debug, PartialEq, Eq)]
552pub enum PMAOVRW {
553    ///0: Clear flag
554    Clear = 0,
555}
556impl From<PMAOVRW> for bool {
557    #[inline(always)]
558    fn from(variant: PMAOVRW) -> Self {
559        variant as u8 != 0
560    }
561}
562///Field `PMAOVR` writer - Packet memory area over / underrun
563pub type PMAOVR_W<'a, REG> = crate::BitWriter0C<'a, REG, PMAOVRW>;
564impl<'a, REG> PMAOVR_W<'a, REG>
565where
566    REG: crate::Writable + crate::RegisterSpec,
567{
568    ///Clear flag
569    #[inline(always)]
570    pub fn clear(self) -> &'a mut crate::W<REG> {
571        self.variant(PMAOVRW::Clear)
572    }
573}
574/**Correct transfer
575
576Value on reset: 0*/
577#[cfg_attr(feature = "defmt", derive(defmt::Format))]
578#[derive(Clone, Copy, Debug, PartialEq, Eq)]
579pub enum CTR {
580    ///1: Endpoint has successfully completed a transaction
581    Completed = 1,
582}
583impl From<CTR> for bool {
584    #[inline(always)]
585    fn from(variant: CTR) -> Self {
586        variant as u8 != 0
587    }
588}
589///Field `CTR` reader - Correct transfer
590pub type CTR_R = crate::BitReader<CTR>;
591impl CTR_R {
592    ///Get enumerated values variant
593    #[inline(always)]
594    pub const fn variant(&self) -> Option<CTR> {
595        match self.bits {
596            true => Some(CTR::Completed),
597            _ => None,
598        }
599    }
600    ///Endpoint has successfully completed a transaction
601    #[inline(always)]
602    pub fn is_completed(&self) -> bool {
603        *self == CTR::Completed
604    }
605}
606impl R {
607    ///Bits 0:3 - Endpoint Identifier
608    #[inline(always)]
609    pub fn ep_id(&self) -> EP_ID_R {
610        EP_ID_R::new((self.bits & 0x0f) as u8)
611    }
612    ///Bit 4 - Direction of transaction
613    #[inline(always)]
614    pub fn dir(&self) -> DIR_R {
615        DIR_R::new(((self.bits >> 4) & 1) != 0)
616    }
617    ///Bit 7 - LPM L1 state request
618    #[inline(always)]
619    pub fn l1req(&self) -> L1REQ_R {
620        L1REQ_R::new(((self.bits >> 7) & 1) != 0)
621    }
622    ///Bit 8 - Expected start frame
623    #[inline(always)]
624    pub fn esof(&self) -> ESOF_R {
625        ESOF_R::new(((self.bits >> 8) & 1) != 0)
626    }
627    ///Bit 9 - start of frame
628    #[inline(always)]
629    pub fn sof(&self) -> SOF_R {
630        SOF_R::new(((self.bits >> 9) & 1) != 0)
631    }
632    ///Bit 10 - reset request
633    #[inline(always)]
634    pub fn reset(&self) -> RESET_R {
635        RESET_R::new(((self.bits >> 10) & 1) != 0)
636    }
637    ///Bit 11 - Suspend mode request
638    #[inline(always)]
639    pub fn susp(&self) -> SUSP_R {
640        SUSP_R::new(((self.bits >> 11) & 1) != 0)
641    }
642    ///Bit 12 - Wakeup
643    #[inline(always)]
644    pub fn wkup(&self) -> WKUP_R {
645        WKUP_R::new(((self.bits >> 12) & 1) != 0)
646    }
647    ///Bit 13 - Error
648    #[inline(always)]
649    pub fn err(&self) -> ERR_R {
650        ERR_R::new(((self.bits >> 13) & 1) != 0)
651    }
652    ///Bit 14 - Packet memory area over / underrun
653    #[inline(always)]
654    pub fn pmaovr(&self) -> PMAOVR_R {
655        PMAOVR_R::new(((self.bits >> 14) & 1) != 0)
656    }
657    ///Bit 15 - Correct transfer
658    #[inline(always)]
659    pub fn ctr(&self) -> CTR_R {
660        CTR_R::new(((self.bits >> 15) & 1) != 0)
661    }
662}
663impl core::fmt::Debug for R {
664    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
665        f.debug_struct("ISTR")
666            .field("ep_id", &self.ep_id())
667            .field("dir", &self.dir())
668            .field("l1req", &self.l1req())
669            .field("esof", &self.esof())
670            .field("sof", &self.sof())
671            .field("reset", &self.reset())
672            .field("susp", &self.susp())
673            .field("wkup", &self.wkup())
674            .field("err", &self.err())
675            .field("pmaovr", &self.pmaovr())
676            .field("ctr", &self.ctr())
677            .finish()
678    }
679}
680impl W {
681    ///Bit 7 - LPM L1 state request
682    #[inline(always)]
683    pub fn l1req(&mut self) -> L1REQ_W<ISTRrs> {
684        L1REQ_W::new(self, 7)
685    }
686    ///Bit 8 - Expected start frame
687    #[inline(always)]
688    pub fn esof(&mut self) -> ESOF_W<ISTRrs> {
689        ESOF_W::new(self, 8)
690    }
691    ///Bit 9 - start of frame
692    #[inline(always)]
693    pub fn sof(&mut self) -> SOF_W<ISTRrs> {
694        SOF_W::new(self, 9)
695    }
696    ///Bit 10 - reset request
697    #[inline(always)]
698    pub fn reset(&mut self) -> RESET_W<ISTRrs> {
699        RESET_W::new(self, 10)
700    }
701    ///Bit 11 - Suspend mode request
702    #[inline(always)]
703    pub fn susp(&mut self) -> SUSP_W<ISTRrs> {
704        SUSP_W::new(self, 11)
705    }
706    ///Bit 12 - Wakeup
707    #[inline(always)]
708    pub fn wkup(&mut self) -> WKUP_W<ISTRrs> {
709        WKUP_W::new(self, 12)
710    }
711    ///Bit 13 - Error
712    #[inline(always)]
713    pub fn err(&mut self) -> ERR_W<ISTRrs> {
714        ERR_W::new(self, 13)
715    }
716    ///Bit 14 - Packet memory area over / underrun
717    #[inline(always)]
718    pub fn pmaovr(&mut self) -> PMAOVR_W<ISTRrs> {
719        PMAOVR_W::new(self, 14)
720    }
721}
722/**interrupt status register
723
724You can [`read`](crate::Reg::read) this register and get [`istr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`istr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
725
726See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#USB:ISTR)*/
727pub struct ISTRrs;
728impl crate::RegisterSpec for ISTRrs {
729    type Ux = u32;
730}
731///`read()` method returns [`istr::R`](R) reader structure
732impl crate::Readable for ISTRrs {}
733///`write(|w| ..)` method takes [`istr::W`](W) writer structure
734impl crate::Writable for ISTRrs {
735    type Safety = crate::Unsafe;
736    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0x7f80;
737}
738///`reset()` method sets ISTR to value 0
739impl crate::Resettable for ISTRrs {}
stm32f0/stm32f0x2/usb/istr.rs

stm32f0/stm32f0x2/usb/
istr.rs
