stm32f0/stm32f0x2/
cec.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr: CR,
6    cfgr: CFGR,
7    txdr: TXDR,
8    rxdr: RXDR,
9    isr: ISR,
10    ier: IER,
11}
12impl RegisterBlock {
13    ///0x00 - control register
14    #[inline(always)]
15    pub const fn cr(&self) -> &CR {
16        &self.cr
17    }
18    ///0x04 - configuration register
19    #[inline(always)]
20    pub const fn cfgr(&self) -> &CFGR {
21        &self.cfgr
22    }
23    ///0x08 - Tx data register
24    #[inline(always)]
25    pub const fn txdr(&self) -> &TXDR {
26        &self.txdr
27    }
28    ///0x0c - Rx Data Register
29    #[inline(always)]
30    pub const fn rxdr(&self) -> &RXDR {
31        &self.rxdr
32    }
33    ///0x10 - Interrupt and Status Register
34    #[inline(always)]
35    pub const fn isr(&self) -> &ISR {
36        &self.isr
37    }
38    ///0x14 - interrupt enable register
39    #[inline(always)]
40    pub const fn ier(&self) -> &IER {
41        &self.ier
42    }
43}
44/**CR (rw) register accessor: control register
45
46You can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
47
48See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#CEC:CR)
49
50For information about available fields see [`mod@cr`] module*/
51pub type CR = crate::Reg<cr::CRrs>;
52///control register
53pub mod cr;
54/**CFGR (rw) register accessor: configuration register
55
56You can [`read`](crate::Reg::read) this register and get [`cfgr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
57
58See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#CEC:CFGR)
59
60For information about available fields see [`mod@cfgr`] module*/
61pub type CFGR = crate::Reg<cfgr::CFGRrs>;
62///configuration register
63pub mod cfgr;
64/**TXDR (w) register accessor: Tx data register
65
66You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
67
68See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#CEC:TXDR)
69
70For information about available fields see [`mod@txdr`] module*/
71pub type TXDR = crate::Reg<txdr::TXDRrs>;
72///Tx data register
73pub mod txdr;
74/**RXDR (r) register accessor: Rx Data Register
75
76You can [`read`](crate::Reg::read) this register and get [`rxdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
77
78See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#CEC:RXDR)
79
80For information about available fields see [`mod@rxdr`] module*/
81pub type RXDR = crate::Reg<rxdr::RXDRrs>;
82///Rx Data Register
83pub mod rxdr;
84/**ISR (rw) register accessor: Interrupt and Status Register
85
86You can [`read`](crate::Reg::read) this register and get [`isr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`isr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
87
88See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#CEC:ISR)
89
90For information about available fields see [`mod@isr`] module*/
91pub type ISR = crate::Reg<isr::ISRrs>;
92///Interrupt and Status Register
93pub mod isr;
94/**IER (rw) register accessor: interrupt enable register
95
96You can [`read`](crate::Reg::read) this register and get [`ier::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
97
98See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#CEC:IER)
99
100For information about available fields see [`mod@ier`] module*/
101pub type IER = crate::Reg<ier::IERrs>;
102///interrupt enable register
103pub mod ier;
stm32f0/stm32f0x2/cec.rs

stm32f0/stm32f0x2/
cec.rs
