stm32f0/stm32f0x2/tim2/
dier.rs

1///Register `DIER` reader
2pub type R = crate::R<DIERrs>;
3///Register `DIER` writer
4pub type W = crate::W<DIERrs>;
5/**Update interrupt enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum UIE {
11    ///0: Update interrupt disabled
12    Disabled = 0,
13    ///1: Update interrupt enabled
14    Enabled = 1,
15}
16impl From<UIE> for bool {
17    #[inline(always)]
18    fn from(variant: UIE) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `UIE` reader - Update interrupt enable
23pub type UIE_R = crate::BitReader<UIE>;
24impl UIE_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> UIE {
28        match self.bits {
29            false => UIE::Disabled,
30            true => UIE::Enabled,
31        }
32    }
33    ///Update interrupt disabled
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == UIE::Disabled
37    }
38    ///Update interrupt enabled
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == UIE::Enabled
42    }
43}
44///Field `UIE` writer - Update interrupt enable
45pub type UIE_W<'a, REG> = crate::BitWriter<'a, REG, UIE>;
46impl<'a, REG> UIE_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Update interrupt disabled
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(UIE::Disabled)
54    }
55    ///Update interrupt enabled
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(UIE::Enabled)
59    }
60}
61/**Capture/Compare %s interrupt enable
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum CC1IE {
67    ///0: CCx interrupt disabled
68    Disabled = 0,
69    ///1: CCx interrupt enabled
70    Enabled = 1,
71}
72impl From<CC1IE> for bool {
73    #[inline(always)]
74    fn from(variant: CC1IE) -> Self {
75        variant as u8 != 0
76    }
77}
78///Field `CCIE(1-4)` reader - Capture/Compare %s interrupt enable
79pub type CCIE_R = crate::BitReader<CC1IE>;
80impl CCIE_R {
81    ///Get enumerated values variant
82    #[inline(always)]
83    pub const fn variant(&self) -> CC1IE {
84        match self.bits {
85            false => CC1IE::Disabled,
86            true => CC1IE::Enabled,
87        }
88    }
89    ///CCx interrupt disabled
90    #[inline(always)]
91    pub fn is_disabled(&self) -> bool {
92        *self == CC1IE::Disabled
93    }
94    ///CCx interrupt enabled
95    #[inline(always)]
96    pub fn is_enabled(&self) -> bool {
97        *self == CC1IE::Enabled
98    }
99}
100///Field `CCIE(1-4)` writer - Capture/Compare %s interrupt enable
101pub type CCIE_W<'a, REG> = crate::BitWriter<'a, REG, CC1IE>;
102impl<'a, REG> CCIE_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    ///CCx interrupt disabled
107    #[inline(always)]
108    pub fn disabled(self) -> &'a mut crate::W<REG> {
109        self.variant(CC1IE::Disabled)
110    }
111    ///CCx interrupt enabled
112    #[inline(always)]
113    pub fn enabled(self) -> &'a mut crate::W<REG> {
114        self.variant(CC1IE::Enabled)
115    }
116}
117/**Trigger interrupt enable
118
119Value on reset: 0*/
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum TIE {
123    ///0: Trigger interrupt disabled
124    Disabled = 0,
125    ///1: Trigger interrupt enabled
126    Enabled = 1,
127}
128impl From<TIE> for bool {
129    #[inline(always)]
130    fn from(variant: TIE) -> Self {
131        variant as u8 != 0
132    }
133}
134///Field `TIE` reader - Trigger interrupt enable
135pub type TIE_R = crate::BitReader<TIE>;
136impl TIE_R {
137    ///Get enumerated values variant
138    #[inline(always)]
139    pub const fn variant(&self) -> TIE {
140        match self.bits {
141            false => TIE::Disabled,
142            true => TIE::Enabled,
143        }
144    }
145    ///Trigger interrupt disabled
146    #[inline(always)]
147    pub fn is_disabled(&self) -> bool {
148        *self == TIE::Disabled
149    }
150    ///Trigger interrupt enabled
151    #[inline(always)]
152    pub fn is_enabled(&self) -> bool {
153        *self == TIE::Enabled
154    }
155}
156///Field `TIE` writer - Trigger interrupt enable
157pub type TIE_W<'a, REG> = crate::BitWriter<'a, REG, TIE>;
158impl<'a, REG> TIE_W<'a, REG>
159where
160    REG: crate::Writable + crate::RegisterSpec,
161{
162    ///Trigger interrupt disabled
163    #[inline(always)]
164    pub fn disabled(self) -> &'a mut crate::W<REG> {
165        self.variant(TIE::Disabled)
166    }
167    ///Trigger interrupt enabled
168    #[inline(always)]
169    pub fn enabled(self) -> &'a mut crate::W<REG> {
170        self.variant(TIE::Enabled)
171    }
172}
173/**Update DMA request enable
174
175Value on reset: 0*/
176#[cfg_attr(feature = "defmt", derive(defmt::Format))]
177#[derive(Clone, Copy, Debug, PartialEq, Eq)]
178pub enum UDE {
179    ///0: Update DMA request disabled
180    Disabled = 0,
181    ///1: Update DMA request enabled
182    Enabled = 1,
183}
184impl From<UDE> for bool {
185    #[inline(always)]
186    fn from(variant: UDE) -> Self {
187        variant as u8 != 0
188    }
189}
190///Field `UDE` reader - Update DMA request enable
191pub type UDE_R = crate::BitReader<UDE>;
192impl UDE_R {
193    ///Get enumerated values variant
194    #[inline(always)]
195    pub const fn variant(&self) -> UDE {
196        match self.bits {
197            false => UDE::Disabled,
198            true => UDE::Enabled,
199        }
200    }
201    ///Update DMA request disabled
202    #[inline(always)]
203    pub fn is_disabled(&self) -> bool {
204        *self == UDE::Disabled
205    }
206    ///Update DMA request enabled
207    #[inline(always)]
208    pub fn is_enabled(&self) -> bool {
209        *self == UDE::Enabled
210    }
211}
212///Field `UDE` writer - Update DMA request enable
213pub type UDE_W<'a, REG> = crate::BitWriter<'a, REG, UDE>;
214impl<'a, REG> UDE_W<'a, REG>
215where
216    REG: crate::Writable + crate::RegisterSpec,
217{
218    ///Update DMA request disabled
219    #[inline(always)]
220    pub fn disabled(self) -> &'a mut crate::W<REG> {
221        self.variant(UDE::Disabled)
222    }
223    ///Update DMA request enabled
224    #[inline(always)]
225    pub fn enabled(self) -> &'a mut crate::W<REG> {
226        self.variant(UDE::Enabled)
227    }
228}
229/**Capture/Compare %s DMA request enable
230
231Value on reset: 0*/
232#[cfg_attr(feature = "defmt", derive(defmt::Format))]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234pub enum CC1DE {
235    ///0: CCx DMA request disabled
236    Disabled = 0,
237    ///1: CCx DMA request enabled
238    Enabled = 1,
239}
240impl From<CC1DE> for bool {
241    #[inline(always)]
242    fn from(variant: CC1DE) -> Self {
243        variant as u8 != 0
244    }
245}
246///Field `CCDE(1-4)` reader - Capture/Compare %s DMA request enable
247pub type CCDE_R = crate::BitReader<CC1DE>;
248impl CCDE_R {
249    ///Get enumerated values variant
250    #[inline(always)]
251    pub const fn variant(&self) -> CC1DE {
252        match self.bits {
253            false => CC1DE::Disabled,
254            true => CC1DE::Enabled,
255        }
256    }
257    ///CCx DMA request disabled
258    #[inline(always)]
259    pub fn is_disabled(&self) -> bool {
260        *self == CC1DE::Disabled
261    }
262    ///CCx DMA request enabled
263    #[inline(always)]
264    pub fn is_enabled(&self) -> bool {
265        *self == CC1DE::Enabled
266    }
267}
268///Field `CCDE(1-4)` writer - Capture/Compare %s DMA request enable
269pub type CCDE_W<'a, REG> = crate::BitWriter<'a, REG, CC1DE>;
270impl<'a, REG> CCDE_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    ///CCx DMA request disabled
275    #[inline(always)]
276    pub fn disabled(self) -> &'a mut crate::W<REG> {
277        self.variant(CC1DE::Disabled)
278    }
279    ///CCx DMA request enabled
280    #[inline(always)]
281    pub fn enabled(self) -> &'a mut crate::W<REG> {
282        self.variant(CC1DE::Enabled)
283    }
284}
285///Field `COMDE` reader - COM DMA request enable
286pub type COMDE_R = crate::BitReader;
287///Field `COMDE` writer - COM DMA request enable
288pub type COMDE_W<'a, REG> = crate::BitWriter<'a, REG>;
289/**Trigger DMA request enable
290
291Value on reset: 0*/
292#[cfg_attr(feature = "defmt", derive(defmt::Format))]
293#[derive(Clone, Copy, Debug, PartialEq, Eq)]
294pub enum TDE {
295    ///0: Trigger DMA request disabled
296    Disabled = 0,
297    ///1: Trigger DMA request enabled
298    Enabled = 1,
299}
300impl From<TDE> for bool {
301    #[inline(always)]
302    fn from(variant: TDE) -> Self {
303        variant as u8 != 0
304    }
305}
306///Field `TDE` reader - Trigger DMA request enable
307pub type TDE_R = crate::BitReader<TDE>;
308impl TDE_R {
309    ///Get enumerated values variant
310    #[inline(always)]
311    pub const fn variant(&self) -> TDE {
312        match self.bits {
313            false => TDE::Disabled,
314            true => TDE::Enabled,
315        }
316    }
317    ///Trigger DMA request disabled
318    #[inline(always)]
319    pub fn is_disabled(&self) -> bool {
320        *self == TDE::Disabled
321    }
322    ///Trigger DMA request enabled
323    #[inline(always)]
324    pub fn is_enabled(&self) -> bool {
325        *self == TDE::Enabled
326    }
327}
328///Field `TDE` writer - Trigger DMA request enable
329pub type TDE_W<'a, REG> = crate::BitWriter<'a, REG, TDE>;
330impl<'a, REG> TDE_W<'a, REG>
331where
332    REG: crate::Writable + crate::RegisterSpec,
333{
334    ///Trigger DMA request disabled
335    #[inline(always)]
336    pub fn disabled(self) -> &'a mut crate::W<REG> {
337        self.variant(TDE::Disabled)
338    }
339    ///Trigger DMA request enabled
340    #[inline(always)]
341    pub fn enabled(self) -> &'a mut crate::W<REG> {
342        self.variant(TDE::Enabled)
343    }
344}
345impl R {
346    ///Bit 0 - Update interrupt enable
347    #[inline(always)]
348    pub fn uie(&self) -> UIE_R {
349        UIE_R::new((self.bits & 1) != 0)
350    }
351    ///Capture/Compare (1-4) interrupt enable
352    ///
353    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IE` field.</div>
354    #[inline(always)]
355    pub fn ccie(&self, n: u8) -> CCIE_R {
356        #[allow(clippy::no_effect)]
357        [(); 4][n as usize];
358        CCIE_R::new(((self.bits >> (n + 1)) & 1) != 0)
359    }
360    ///Iterator for array of:
361    ///Capture/Compare (1-4) interrupt enable
362    #[inline(always)]
363    pub fn ccie_iter(&self) -> impl Iterator<Item = CCIE_R> + '_ {
364        (0..4).map(move |n| CCIE_R::new(((self.bits >> (n + 1)) & 1) != 0))
365    }
366    ///Bit 1 - Capture/Compare 1 interrupt enable
367    #[inline(always)]
368    pub fn cc1ie(&self) -> CCIE_R {
369        CCIE_R::new(((self.bits >> 1) & 1) != 0)
370    }
371    ///Bit 2 - Capture/Compare 2 interrupt enable
372    #[inline(always)]
373    pub fn cc2ie(&self) -> CCIE_R {
374        CCIE_R::new(((self.bits >> 2) & 1) != 0)
375    }
376    ///Bit 3 - Capture/Compare 3 interrupt enable
377    #[inline(always)]
378    pub fn cc3ie(&self) -> CCIE_R {
379        CCIE_R::new(((self.bits >> 3) & 1) != 0)
380    }
381    ///Bit 4 - Capture/Compare 4 interrupt enable
382    #[inline(always)]
383    pub fn cc4ie(&self) -> CCIE_R {
384        CCIE_R::new(((self.bits >> 4) & 1) != 0)
385    }
386    ///Bit 6 - Trigger interrupt enable
387    #[inline(always)]
388    pub fn tie(&self) -> TIE_R {
389        TIE_R::new(((self.bits >> 6) & 1) != 0)
390    }
391    ///Bit 8 - Update DMA request enable
392    #[inline(always)]
393    pub fn ude(&self) -> UDE_R {
394        UDE_R::new(((self.bits >> 8) & 1) != 0)
395    }
396    ///Capture/Compare (1-4) DMA request enable
397    ///
398    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1DE` field.</div>
399    #[inline(always)]
400    pub fn ccde(&self, n: u8) -> CCDE_R {
401        #[allow(clippy::no_effect)]
402        [(); 4][n as usize];
403        CCDE_R::new(((self.bits >> (n + 9)) & 1) != 0)
404    }
405    ///Iterator for array of:
406    ///Capture/Compare (1-4) DMA request enable
407    #[inline(always)]
408    pub fn ccde_iter(&self) -> impl Iterator<Item = CCDE_R> + '_ {
409        (0..4).map(move |n| CCDE_R::new(((self.bits >> (n + 9)) & 1) != 0))
410    }
411    ///Bit 9 - Capture/Compare 1 DMA request enable
412    #[inline(always)]
413    pub fn cc1de(&self) -> CCDE_R {
414        CCDE_R::new(((self.bits >> 9) & 1) != 0)
415    }
416    ///Bit 10 - Capture/Compare 2 DMA request enable
417    #[inline(always)]
418    pub fn cc2de(&self) -> CCDE_R {
419        CCDE_R::new(((self.bits >> 10) & 1) != 0)
420    }
421    ///Bit 11 - Capture/Compare 3 DMA request enable
422    #[inline(always)]
423    pub fn cc3de(&self) -> CCDE_R {
424        CCDE_R::new(((self.bits >> 11) & 1) != 0)
425    }
426    ///Bit 12 - Capture/Compare 4 DMA request enable
427    #[inline(always)]
428    pub fn cc4de(&self) -> CCDE_R {
429        CCDE_R::new(((self.bits >> 12) & 1) != 0)
430    }
431    ///Bit 13 - COM DMA request enable
432    #[inline(always)]
433    pub fn comde(&self) -> COMDE_R {
434        COMDE_R::new(((self.bits >> 13) & 1) != 0)
435    }
436    ///Bit 14 - Trigger DMA request enable
437    #[inline(always)]
438    pub fn tde(&self) -> TDE_R {
439        TDE_R::new(((self.bits >> 14) & 1) != 0)
440    }
441}
442impl core::fmt::Debug for R {
443    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
444        f.debug_struct("DIER")
445            .field("tde", &self.tde())
446            .field("comde", &self.comde())
447            .field("cc1de", &self.cc1de())
448            .field("cc2de", &self.cc2de())
449            .field("cc3de", &self.cc3de())
450            .field("cc4de", &self.cc4de())
451            .field("ude", &self.ude())
452            .field("tie", &self.tie())
453            .field("cc1ie", &self.cc1ie())
454            .field("cc2ie", &self.cc2ie())
455            .field("cc3ie", &self.cc3ie())
456            .field("cc4ie", &self.cc4ie())
457            .field("uie", &self.uie())
458            .finish()
459    }
460}
461impl W {
462    ///Bit 0 - Update interrupt enable
463    #[inline(always)]
464    pub fn uie(&mut self) -> UIE_W<DIERrs> {
465        UIE_W::new(self, 0)
466    }
467    ///Capture/Compare (1-4) interrupt enable
468    ///
469    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1IE` field.</div>
470    #[inline(always)]
471    pub fn ccie(&mut self, n: u8) -> CCIE_W<DIERrs> {
472        #[allow(clippy::no_effect)]
473        [(); 4][n as usize];
474        CCIE_W::new(self, n + 1)
475    }
476    ///Bit 1 - Capture/Compare 1 interrupt enable
477    #[inline(always)]
478    pub fn cc1ie(&mut self) -> CCIE_W<DIERrs> {
479        CCIE_W::new(self, 1)
480    }
481    ///Bit 2 - Capture/Compare 2 interrupt enable
482    #[inline(always)]
483    pub fn cc2ie(&mut self) -> CCIE_W<DIERrs> {
484        CCIE_W::new(self, 2)
485    }
486    ///Bit 3 - Capture/Compare 3 interrupt enable
487    #[inline(always)]
488    pub fn cc3ie(&mut self) -> CCIE_W<DIERrs> {
489        CCIE_W::new(self, 3)
490    }
491    ///Bit 4 - Capture/Compare 4 interrupt enable
492    #[inline(always)]
493    pub fn cc4ie(&mut self) -> CCIE_W<DIERrs> {
494        CCIE_W::new(self, 4)
495    }
496    ///Bit 6 - Trigger interrupt enable
497    #[inline(always)]
498    pub fn tie(&mut self) -> TIE_W<DIERrs> {
499        TIE_W::new(self, 6)
500    }
501    ///Bit 8 - Update DMA request enable
502    #[inline(always)]
503    pub fn ude(&mut self) -> UDE_W<DIERrs> {
504        UDE_W::new(self, 8)
505    }
506    ///Capture/Compare (1-4) DMA request enable
507    ///
508    ///<div class="warning">`n` is number of field in register. `n == 0` corresponds to `CC1DE` field.</div>
509    #[inline(always)]
510    pub fn ccde(&mut self, n: u8) -> CCDE_W<DIERrs> {
511        #[allow(clippy::no_effect)]
512        [(); 4][n as usize];
513        CCDE_W::new(self, n + 9)
514    }
515    ///Bit 9 - Capture/Compare 1 DMA request enable
516    #[inline(always)]
517    pub fn cc1de(&mut self) -> CCDE_W<DIERrs> {
518        CCDE_W::new(self, 9)
519    }
520    ///Bit 10 - Capture/Compare 2 DMA request enable
521    #[inline(always)]
522    pub fn cc2de(&mut self) -> CCDE_W<DIERrs> {
523        CCDE_W::new(self, 10)
524    }
525    ///Bit 11 - Capture/Compare 3 DMA request enable
526    #[inline(always)]
527    pub fn cc3de(&mut self) -> CCDE_W<DIERrs> {
528        CCDE_W::new(self, 11)
529    }
530    ///Bit 12 - Capture/Compare 4 DMA request enable
531    #[inline(always)]
532    pub fn cc4de(&mut self) -> CCDE_W<DIERrs> {
533        CCDE_W::new(self, 12)
534    }
535    ///Bit 13 - COM DMA request enable
536    #[inline(always)]
537    pub fn comde(&mut self) -> COMDE_W<DIERrs> {
538        COMDE_W::new(self, 13)
539    }
540    ///Bit 14 - Trigger DMA request enable
541    #[inline(always)]
542    pub fn tde(&mut self) -> TDE_W<DIERrs> {
543        TDE_W::new(self, 14)
544    }
545}
546/**DMA/Interrupt enable register
547
548You can [`read`](crate::Reg::read) this register and get [`dier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
549
550See register [structure](https://stm32-rs.github.io/stm32-rs/STM32F0x2.html#TIM2:DIER)*/
551pub struct DIERrs;
552impl crate::RegisterSpec for DIERrs {
553    type Ux = u32;
554}
555///`read()` method returns [`dier::R`](R) reader structure
556impl crate::Readable for DIERrs {}
557///`write(|w| ..)` method takes [`dier::W`](W) writer structure
558impl crate::Writable for DIERrs {
559    type Safety = crate::Unsafe;
560}
561///`reset()` method sets DIER to value 0
562impl crate::Resettable for DIERrs {}
stm32f0/stm32f0x2/tim2/dier.rs

stm32f0/stm32f0x2/tim2/
dier.rs
