stm32f0/stm32f0x2/spi1/
i2spr.rs

1#[doc = "Register `I2SPR` reader"]
2pub struct R(crate::R<I2SPR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<I2SPR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<I2SPR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<I2SPR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `I2SPR` writer"]
17pub struct W(crate::W<I2SPR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<I2SPR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<I2SPR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<I2SPR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Master clock output enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum MCKOE_A {
40    #[doc = "0: Master clock output is disabled"]
41    Disabled = 0,
42    #[doc = "1: Master clock output is enabled"]
43    Enabled = 1,
44}
45impl From<MCKOE_A> for bool {
46    #[inline(always)]
47    fn from(variant: MCKOE_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `MCKOE` reader - Master clock output enable"]
52pub type MCKOE_R = crate::BitReader<MCKOE_A>;
53impl MCKOE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> MCKOE_A {
57        match self.bits {
58            false => MCKOE_A::Disabled,
59            true => MCKOE_A::Enabled,
60        }
61    }
62    #[doc = "Checks if the value of the field is `Disabled`"]
63    #[inline(always)]
64    pub fn is_disabled(&self) -> bool {
65        *self == MCKOE_A::Disabled
66    }
67    #[doc = "Checks if the value of the field is `Enabled`"]
68    #[inline(always)]
69    pub fn is_enabled(&self) -> bool {
70        *self == MCKOE_A::Enabled
71    }
72}
73#[doc = "Field `MCKOE` writer - Master clock output enable"]
74pub type MCKOE_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SPR_SPEC, MCKOE_A, O>;
75impl<'a, const O: u8> MCKOE_W<'a, O> {
76    #[doc = "Master clock output is disabled"]
77    #[inline(always)]
78    pub fn disabled(self) -> &'a mut W {
79        self.variant(MCKOE_A::Disabled)
80    }
81    #[doc = "Master clock output is enabled"]
82    #[inline(always)]
83    pub fn enabled(self) -> &'a mut W {
84        self.variant(MCKOE_A::Enabled)
85    }
86}
87#[doc = "Odd factor for the prescaler\n\nValue on reset: 0"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum ODD_A {
90    #[doc = "0: Real divider value is I2SDIV * 2"]
91    Even = 0,
92    #[doc = "1: Real divider value is (I2SDIV * 2) + 1"]
93    Odd = 1,
94}
95impl From<ODD_A> for bool {
96    #[inline(always)]
97    fn from(variant: ODD_A) -> Self {
98        variant as u8 != 0
99    }
100}
101#[doc = "Field `ODD` reader - Odd factor for the prescaler"]
102pub type ODD_R = crate::BitReader<ODD_A>;
103impl ODD_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> ODD_A {
107        match self.bits {
108            false => ODD_A::Even,
109            true => ODD_A::Odd,
110        }
111    }
112    #[doc = "Checks if the value of the field is `Even`"]
113    #[inline(always)]
114    pub fn is_even(&self) -> bool {
115        *self == ODD_A::Even
116    }
117    #[doc = "Checks if the value of the field is `Odd`"]
118    #[inline(always)]
119    pub fn is_odd(&self) -> bool {
120        *self == ODD_A::Odd
121    }
122}
123#[doc = "Field `ODD` writer - Odd factor for the prescaler"]
124pub type ODD_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2SPR_SPEC, ODD_A, O>;
125impl<'a, const O: u8> ODD_W<'a, O> {
126    #[doc = "Real divider value is I2SDIV * 2"]
127    #[inline(always)]
128    pub fn even(self) -> &'a mut W {
129        self.variant(ODD_A::Even)
130    }
131    #[doc = "Real divider value is (I2SDIV * 2) + 1"]
132    #[inline(always)]
133    pub fn odd(self) -> &'a mut W {
134        self.variant(ODD_A::Odd)
135    }
136}
137#[doc = "Field `I2SDIV` reader - I2S Linear prescaler"]
138pub type I2SDIV_R = crate::FieldReader<u8, u8>;
139#[doc = "Field `I2SDIV` writer - I2S Linear prescaler"]
140pub type I2SDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2SPR_SPEC, u8, u8, 8, O>;
141impl R {
142    #[doc = "Bit 9 - Master clock output enable"]
143    #[inline(always)]
144    pub fn mckoe(&self) -> MCKOE_R {
145        MCKOE_R::new(((self.bits >> 9) & 1) != 0)
146    }
147    #[doc = "Bit 8 - Odd factor for the prescaler"]
148    #[inline(always)]
149    pub fn odd(&self) -> ODD_R {
150        ODD_R::new(((self.bits >> 8) & 1) != 0)
151    }
152    #[doc = "Bits 0:7 - I2S Linear prescaler"]
153    #[inline(always)]
154    pub fn i2sdiv(&self) -> I2SDIV_R {
155        I2SDIV_R::new((self.bits & 0xff) as u8)
156    }
157}
158impl W {
159    #[doc = "Bit 9 - Master clock output enable"]
160    #[inline(always)]
161    pub fn mckoe(&mut self) -> MCKOE_W<9> {
162        MCKOE_W::new(self)
163    }
164    #[doc = "Bit 8 - Odd factor for the prescaler"]
165    #[inline(always)]
166    pub fn odd(&mut self) -> ODD_W<8> {
167        ODD_W::new(self)
168    }
169    #[doc = "Bits 0:7 - I2S Linear prescaler"]
170    #[inline(always)]
171    pub fn i2sdiv(&mut self) -> I2SDIV_W<0> {
172        I2SDIV_W::new(self)
173    }
174    #[doc = "Writes raw bits to the register."]
175    #[inline(always)]
176    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
177        self.0.bits(bits);
178        self
179    }
180}
181#[doc = "I2S prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2spr](index.html) module"]
182pub struct I2SPR_SPEC;
183impl crate::RegisterSpec for I2SPR_SPEC {
184    type Ux = u32;
185}
186#[doc = "`read()` method returns [i2spr::R](R) reader structure"]
187impl crate::Readable for I2SPR_SPEC {
188    type Reader = R;
189}
190#[doc = "`write(|w| ..)` method takes [i2spr::W](W) writer structure"]
191impl crate::Writable for I2SPR_SPEC {
192    type Writer = W;
193}
194#[doc = "`reset()` method sets I2SPR to value 0x10"]
195impl crate::Resettable for I2SPR_SPEC {
196    #[inline(always)]
197    fn reset_value() -> Self::Ux {
198        0x10
199    }
200}
stm32f0/stm32f0x2/spi1/i2spr.rs

stm32f0/stm32f0x2/spi1/
i2spr.rs
