stm32f0/stm32f0x0/flash/
acr.rs

1#[doc = "Register `ACR` reader"]
2pub struct R(crate::R<ACR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ACR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ACR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ACR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ACR` writer"]
17pub struct W(crate::W<ACR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ACR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ACR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ACR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "LATENCY\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum LATENCY_A {
41    #[doc = "0: 0 wait states"]
42    Ws0 = 0,
43    #[doc = "1: 1 wait state"]
44    Ws1 = 1,
45}
46impl From<LATENCY_A> for u8 {
47    #[inline(always)]
48    fn from(variant: LATENCY_A) -> Self {
49        variant as _
50    }
51}
52#[doc = "Field `LATENCY` reader - LATENCY"]
53pub type LATENCY_R = crate::FieldReader<u8, LATENCY_A>;
54impl LATENCY_R {
55    #[doc = "Get enumerated values variant"]
56    #[inline(always)]
57    pub fn variant(&self) -> Option<LATENCY_A> {
58        match self.bits {
59            0 => Some(LATENCY_A::Ws0),
60            1 => Some(LATENCY_A::Ws1),
61            _ => None,
62        }
63    }
64    #[doc = "Checks if the value of the field is `Ws0`"]
65    #[inline(always)]
66    pub fn is_ws0(&self) -> bool {
67        *self == LATENCY_A::Ws0
68    }
69    #[doc = "Checks if the value of the field is `Ws1`"]
70    #[inline(always)]
71    pub fn is_ws1(&self) -> bool {
72        *self == LATENCY_A::Ws1
73    }
74}
75#[doc = "Field `LATENCY` writer - LATENCY"]
76pub type LATENCY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ACR_SPEC, u8, LATENCY_A, 3, O>;
77impl<'a, const O: u8> LATENCY_W<'a, O> {
78    #[doc = "0 wait states"]
79    #[inline(always)]
80    pub fn ws0(self) -> &'a mut W {
81        self.variant(LATENCY_A::Ws0)
82    }
83    #[doc = "1 wait state"]
84    #[inline(always)]
85    pub fn ws1(self) -> &'a mut W {
86        self.variant(LATENCY_A::Ws1)
87    }
88}
89#[doc = "PRFTBE\n\nValue on reset: 1"]
90#[derive(Clone, Copy, Debug, PartialEq)]
91pub enum PRFTBE_A {
92    #[doc = "0: Prefetch is disabled"]
93    Disabled = 0,
94    #[doc = "1: Prefetch is enabled"]
95    Enabled = 1,
96}
97impl From<PRFTBE_A> for bool {
98    #[inline(always)]
99    fn from(variant: PRFTBE_A) -> Self {
100        variant as u8 != 0
101    }
102}
103#[doc = "Field `PRFTBE` reader - PRFTBE"]
104pub type PRFTBE_R = crate::BitReader<PRFTBE_A>;
105impl PRFTBE_R {
106    #[doc = "Get enumerated values variant"]
107    #[inline(always)]
108    pub fn variant(&self) -> PRFTBE_A {
109        match self.bits {
110            false => PRFTBE_A::Disabled,
111            true => PRFTBE_A::Enabled,
112        }
113    }
114    #[doc = "Checks if the value of the field is `Disabled`"]
115    #[inline(always)]
116    pub fn is_disabled(&self) -> bool {
117        *self == PRFTBE_A::Disabled
118    }
119    #[doc = "Checks if the value of the field is `Enabled`"]
120    #[inline(always)]
121    pub fn is_enabled(&self) -> bool {
122        *self == PRFTBE_A::Enabled
123    }
124}
125#[doc = "Field `PRFTBE` writer - PRFTBE"]
126pub type PRFTBE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ACR_SPEC, PRFTBE_A, O>;
127impl<'a, const O: u8> PRFTBE_W<'a, O> {
128    #[doc = "Prefetch is disabled"]
129    #[inline(always)]
130    pub fn disabled(self) -> &'a mut W {
131        self.variant(PRFTBE_A::Disabled)
132    }
133    #[doc = "Prefetch is enabled"]
134    #[inline(always)]
135    pub fn enabled(self) -> &'a mut W {
136        self.variant(PRFTBE_A::Enabled)
137    }
138}
139#[doc = "PRFTBS\n\nValue on reset: 1"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum PRFTBS_A {
142    #[doc = "0: Prefetch buffer is disabled"]
143    Disabled = 0,
144    #[doc = "1: Prefetch buffer is enabled"]
145    Enabled = 1,
146}
147impl From<PRFTBS_A> for bool {
148    #[inline(always)]
149    fn from(variant: PRFTBS_A) -> Self {
150        variant as u8 != 0
151    }
152}
153#[doc = "Field `PRFTBS` reader - PRFTBS"]
154pub type PRFTBS_R = crate::BitReader<PRFTBS_A>;
155impl PRFTBS_R {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub fn variant(&self) -> PRFTBS_A {
159        match self.bits {
160            false => PRFTBS_A::Disabled,
161            true => PRFTBS_A::Enabled,
162        }
163    }
164    #[doc = "Checks if the value of the field is `Disabled`"]
165    #[inline(always)]
166    pub fn is_disabled(&self) -> bool {
167        *self == PRFTBS_A::Disabled
168    }
169    #[doc = "Checks if the value of the field is `Enabled`"]
170    #[inline(always)]
171    pub fn is_enabled(&self) -> bool {
172        *self == PRFTBS_A::Enabled
173    }
174}
175impl R {
176    #[doc = "Bits 0:2 - LATENCY"]
177    #[inline(always)]
178    pub fn latency(&self) -> LATENCY_R {
179        LATENCY_R::new((self.bits & 7) as u8)
180    }
181    #[doc = "Bit 4 - PRFTBE"]
182    #[inline(always)]
183    pub fn prftbe(&self) -> PRFTBE_R {
184        PRFTBE_R::new(((self.bits >> 4) & 1) != 0)
185    }
186    #[doc = "Bit 5 - PRFTBS"]
187    #[inline(always)]
188    pub fn prftbs(&self) -> PRFTBS_R {
189        PRFTBS_R::new(((self.bits >> 5) & 1) != 0)
190    }
191}
192impl W {
193    #[doc = "Bits 0:2 - LATENCY"]
194    #[inline(always)]
195    pub fn latency(&mut self) -> LATENCY_W<0> {
196        LATENCY_W::new(self)
197    }
198    #[doc = "Bit 4 - PRFTBE"]
199    #[inline(always)]
200    pub fn prftbe(&mut self) -> PRFTBE_W<4> {
201        PRFTBE_W::new(self)
202    }
203    #[doc = "Writes raw bits to the register."]
204    #[inline(always)]
205    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
206        self.0.bits(bits);
207        self
208    }
209}
210#[doc = "Flash access control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acr](index.html) module"]
211pub struct ACR_SPEC;
212impl crate::RegisterSpec for ACR_SPEC {
213    type Ux = u32;
214}
215#[doc = "`read()` method returns [acr::R](R) reader structure"]
216impl crate::Readable for ACR_SPEC {
217    type Reader = R;
218}
219#[doc = "`write(|w| ..)` method takes [acr::W](W) writer structure"]
220impl crate::Writable for ACR_SPEC {
221    type Writer = W;
222}
223#[doc = "`reset()` method sets ACR to value 0x30"]
224impl crate::Resettable for ACR_SPEC {
225    #[inline(always)]
226    fn reset_value() -> Self::Ux {
227        0x30
228    }
229}
stm32f0/stm32f0x0/flash/acr.rs

stm32f0/stm32f0x0/flash/
acr.rs
