1use core::marker::PhantomData;
2
3use crate::ext::{Cmp, MasterExt};
4#[cfg(feature = "hrtim_v2")]
5use crate::pac::{HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, HRTIM_TIMF};
6use crate::timer::{Instance, InstanceX};
7use crate::{pac::HRTIM_MASTER, DacStepTrigger, NoDacTrigger};
8
9pub trait HrCompareRegister {
10 fn get_duty(&self) -> u16;
11 fn set_duty(&mut self, duty: u16);
12}
13
14pub struct Cmp1;
15pub struct Cmp2;
16pub struct Cmp3;
17pub struct Cmp4;
18
19pub trait CmpExt {
20 const CMP: Cmp;
21}
22
23impl CmpExt for Cmp1 {
24 const CMP: Cmp = Cmp::Cmp1;
25}
26impl CmpExt for Cmp2 {
27 const CMP: Cmp = Cmp::Cmp2;
28}
29impl CmpExt for Cmp3 {
30 const CMP: Cmp = Cmp::Cmp3;
31}
32impl CmpExt for Cmp4 {
33 const CMP: Cmp = Cmp::Cmp4;
34}
35
36pub struct HrCr<TIM, PSCL, CMP, DacStp: DacStepTrigger = NoDacTrigger>(
37 PhantomData<(TIM, PSCL, CMP, DacStp)>,
38);
39pub type HrCr1<TIM, PSCL, DacStp = NoDacTrigger> = HrCr<TIM, PSCL, Cmp1, DacStp>;
40pub type HrCr2<TIM, PSCL, DacStp = NoDacTrigger> = HrCr<TIM, PSCL, Cmp2, DacStp>;
41pub type HrCr3<TIM, PSCL, DacStp = NoDacTrigger> = HrCr<TIM, PSCL, Cmp3, DacStp>;
42pub type HrCr4<TIM, PSCL, DacStp = NoDacTrigger> = HrCr<TIM, PSCL, Cmp4, DacStp>;
43
44#[cfg(feature = "stm32g4")]
45use super::adc_trigger::{
46 AdcTrigger13 as Adc13, AdcTrigger24 as Adc24, AdcTrigger579 as Adc579,
47 AdcTrigger6810 as Adc6810,
48};
49
50impl<TIM: Instance, PSCL, CMP: CmpExt, S: DacStepTrigger> HrCompareRegister
51 for HrCr<TIM, PSCL, CMP, S>
52{
53 fn get_duty(&self) -> u16 {
54 let tim = unsafe { &*TIM::ptr() };
55
56 tim.cmpr(CMP::CMP).read().cmp().bits()
57 }
58 fn set_duty(&mut self, duty: u16) {
59 let tim = unsafe { &*TIM::ptr() };
60
61 tim.cmpr(CMP::CMP).write(|w| unsafe { w.cmp().bits(duty) });
62 }
63}
64
65macro_rules! hrtim_cr_helper {
66 (HRTIM_MASTER: $cr_type:ident:
67 [$(($Trigger:ty: $trigger_bits:expr)),*],
68 [$(($event_dst:ident, $tim_event_index:expr)),*],
69 ) => {
70 hrtim_cr_helper!(HRTIM_MASTER: $cr_type: [$(($Trigger: $trigger_bits)),*], [$(($event_dst, $tim_event_index)),*]);
72 };
73
74 ($TIMX:ident: $cr_type:ident:
75 [$(($Trigger:ty: $trigger_bits:expr)),*],
76 [$(($event_dst:ident, $tim_event_index:expr)),*]
77 ) => {
78 $(
79 impl<PSCL> super::event::EventSource<$event_dst, PSCL> for $cr_type<$TIMX, PSCL> {
81 const BITS: u32 = 1 << ($tim_event_index + 11); }
83 )*
84
85 $(
86 impl<PSCL> $Trigger for $cr_type<$TIMX, PSCL> {
87 const BITS: u32 = $trigger_bits;
88 }
89 )*
90 };
91}
92
93macro_rules! hrtim_cr {
94 ($($TIMX:ident: [
95 [$(($cr1_trigger:ident: $cr1_trigger_bits:expr)),*], [$(($cr1_event_dst:ident, $cr1_tim_event_index:expr)),*],
96 [$(($cr2_trigger:ident: $cr2_trigger_bits:expr)),*], [$(($cr2_event_dst:ident, $cr2_tim_event_index:expr)),*],
97 [$(($cr3_trigger:ident: $cr3_trigger_bits:expr)),*], [$(($cr3_event_dst:ident, $cr3_tim_event_index:expr)),*],
98 [$(($cr4_trigger:ident: $cr4_trigger_bits:expr)),*], [$(($cr4_event_dst:ident, $cr4_tim_event_index:expr)),*]
99 ]),+) => {$(
100 hrtim_cr_helper!($TIMX: HrCr1: [$(($cr1_trigger: $cr1_trigger_bits)),*], [$(($cr1_event_dst, $cr1_tim_event_index)),*]);
101 hrtim_cr_helper!($TIMX: HrCr2: [$(($cr2_trigger: $cr2_trigger_bits)),*], [$(($cr2_event_dst, $cr2_tim_event_index)),*]);
102 hrtim_cr_helper!($TIMX: HrCr3: [$(($cr3_trigger: $cr3_trigger_bits)),*], [$(($cr3_event_dst, $cr3_tim_event_index)),*]);
103 hrtim_cr_helper!($TIMX: HrCr4: [$(($cr4_trigger: $cr4_trigger_bits)),*], [$(($cr4_event_dst, $cr4_tim_event_index)),*]);
104 )+};
105}
106
107#[cfg(feature = "stm32g4")]
109hrtim_cr! {
110 HRTIM_MASTER: [
111 [(Adc13: 1 << 0), (Adc24: 1 << 0), (Adc579: 0), (Adc6810: 0) ], [],
112 [(Adc13: 1 << 1), (Adc24: 1 << 1), (Adc579: 1), (Adc6810: 1) ], [],
113 [(Adc13: 1 << 2), (Adc24: 1 << 2), (Adc579: 2), (Adc6810: 2) ], [],
114 [(Adc13: 1 << 3), (Adc24: 1 << 3), (Adc579: 3), (Adc6810: 3) ], []
115 ],
116
117 HRTIM_TIMA: [
118 [ ], [(HRTIM_TIMB, 1), (HRTIM_TIMD, 1) ],
119 [ (Adc24: 1 << 10), (Adc6810: 10)], [(HRTIM_TIMB, 2), (HRTIM_TIMC, 1) ],
120 [(Adc13: 1 << 11), (Adc579: 10) ], [(HRTIM_TIMC, 2), (HRTIM_TIMF, 1) ],
121 [(Adc13: 1 << 12), (Adc24: 1 << 12), (Adc579: 11), (Adc6810: 11)], [(HRTIM_TIMD, 2), (HRTIM_TIME, 1) ]
122 ],
123
124 HRTIM_TIMB: [
125 [ ], [(HRTIM_TIMA, 1), (HRTIM_TIMF, 2) ],
126 [ (Adc24: 1 << 14), (Adc6810: 13)], [(HRTIM_TIMA, 2), (HRTIM_TIMC, 3), (HRTIM_TIMD, 3)],
127 [(Adc13: 1 << 16), (Adc579: 14) ], [(HRTIM_TIMC, 4), (HRTIM_TIME, 2) ],
128 [(Adc13: 1 << 17), (Adc24: 1 << 16), (Adc579: 15), (Adc6810: 14)], [(HRTIM_TIMD, 4), (HRTIM_TIME, 3), (HRTIM_TIMF, 3)]
129 ],
130
131 HRTIM_TIMC: [
132 [ ], [(HRTIM_TIME, 4), (HRTIM_TIMF, 4) ],
133 [ (Adc24: 1 << 18), (Adc6810: 16)], [(HRTIM_TIMA, 3), (HRTIM_TIME, 5) ],
134 [(Adc13: 1 << 21), (Adc579: 18) ], [(HRTIM_TIMA, 4), (HRTIM_TIMB, 3) ],
135 [(Adc13: 1 << 22), (Adc24: 1 << 20), (Adc579: 19), (Adc6810: 17)], [(HRTIM_TIMB, 4), (HRTIM_TIMD, 5), (HRTIM_TIMF, 5)]
136 ],
137
138 HRTIM_TIMD: [
139 [ ], [(HRTIM_TIMA, 5), (HRTIM_TIME, 6) ],
140 [ (Adc24: 1 << 23), (Adc6810: 20)], [(HRTIM_TIMA, 6), (HRTIM_TIMC, 5), (HRTIM_TIME, 7)],
141 [(Adc13: 1 << 25), (Adc579: 21) ], [(HRTIM_TIMB, 5), (HRTIM_TIMF, 6) ],
142 [(Adc13: 1 << 26), (Adc24: 1 << 25), (Adc579: 22), (Adc6810: 21)], [(HRTIM_TIMB, 6), (HRTIM_TIMC, 6), (HRTIM_TIMF, 7)]
143 ],
144
145 HRTIM_TIME: [
146 [ ], [(HRTIM_TIMB, 7), (HRTIM_TIMD, 6) ],
147 [ (Adc24: 1 << 28), (Adc6810: 24)], [(HRTIM_TIMB, 8), (HRTIM_TIMF, 8) ],
148 [(Adc13: 1 << 29), (Adc24: 1 << 29), (Adc579: 24), (Adc6810: 25)], [(HRTIM_TIMA, 7), (HRTIM_TIMC, 7), (HRTIM_TIMF, 9)],
149 [(Adc13: 1 << 30), (Adc24: 1 << 30), (Adc579: 25), (Adc6810: 26)], [(HRTIM_TIMA, 8), (HRTIM_TIMC, 8), (HRTIM_TIMD, 7)]
150 ],
151
152 HRTIM_TIMF: [
153 [ (Adc24: 1 << 15) ], [(HRTIM_TIMD, 8) ],
154 [(Adc13: 1 << 10), (Adc24: 1 << 11), (Adc579: 27), (Adc6810: 28)], [(HRTIM_TIMC, 9) ],
155 [(Adc13: 1 << 15), (Adc579: 28), (Adc6810: 29)], [(HRTIM_TIMB, 9), (HRTIM_TIMD, 9), (HRTIM_TIME, 8)],
156 [(Adc13: 1 << 20), (Adc24: 1 << 19), (Adc579: 29), (Adc6810: 30)], [(HRTIM_TIMA, 9), (HRTIM_TIME, 9) ]
157 ]
158}
159
160#[cfg(any(feature = "stm32f3", feature = "stm32h7"))]
162hrtim_cr! {
163 HRTIM_MASTER: [
164 [], [],
165 [], [],
166 [], [],
167 [], []
168 ],
169
170 HRTIM_TIMA: [
171 [], [],
172 [], [],
173 [], [],
174 [], []
175 ],
176
177 HRTIM_TIMB: [
178 [], [],
179 [], [],
180 [], [],
181 [], []
182 ],
183
184 HRTIM_TIMC: [
185 [], [],
186 [], [],
187 [], [],
188 [], []
189 ],
190
191 HRTIM_TIMD: [
192 [], [],
193 [], [],
194 [], [],
195 [], []
196 ],
197
198 HRTIM_TIME: [
199 [], [],
200 [], [],
201 [], [],
202 [], []
203 ]
204}
205
206impl<DST, PSCL, CMP: CmpExt> super::event::EventSource<DST, PSCL>
208 for HrCr<HRTIM_MASTER, PSCL, CMP>
209{
210 const BITS: u32 = 1 << (CMP::CMP as u8 + 8); }
212
213impl<DST, PSCL, CMP: CmpExt> super::event::TimerResetEventSource<DST, PSCL>
214 for HrCr<HRTIM_MASTER, PSCL, CMP>
215{
216 const BITS: u32 = 1 << (CMP::CMP as u8 + 5); }
218
219impl<TIM: InstanceX, PSCL, CMP: CmpExt> super::event::EventSource<TIM, PSCL>
221 for HrCr<TIM, PSCL, CMP>
222{
223 const BITS: u32 = 1 << (CMP::CMP as u8 + 3);
224}
225
226impl<TIM: InstanceX, DST, PSCL> super::event::TimerResetEventSource<DST, PSCL>
227 for HrCr2<TIM, PSCL>
228{
229 const BITS: u32 = 1 << 2;
230}
231
232impl<TIM: InstanceX, DST, PSCL> super::event::TimerResetEventSource<DST, PSCL>
233 for HrCr4<TIM, PSCL>
234{
235 const BITS: u32 = 1 << 3;
236}