Struct stm32_hal2::pac::i2c1::cr2::CR2_SPEC

pub struct CR2_SPEC;

Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see cr2 module

Trait Implementations

impl Readable for CR2_SPEC

read() method returns cr2::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for CR2_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CR2_SPEC

reset() method sets CR2 to value 0

fn reset_value() -> <CR2_SPEC as RegisterSpec>::Ux

Reset value of the register.

impl Writable for CR2_SPEC

write(|w| ..) method takes cr2::W writer structure

type Writer = W

Writer type argument to write, et al.