Module tocc 

FDCAN timeout counter configuration register

Structs

TOCCrs

FDCAN timeout counter configuration register

Type Aliases

ETOC_R

Field ETOC reader - Timeout counter enable This is a protected write (P) bit, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

ETOC_W

Field ETOC writer - Timeout counter enable This is a protected write (P) bit, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

R

Register TOCC reader

TOP_R

Field TOP reader - Timeout period Start value of the timeout counter (down-counter). Configures the timeout period.

TOP_W

Field TOP writer - Timeout period Start value of the timeout counter (down-counter). Configures the timeout period.

TOS_R

Field TOS reader - Timeout select When operating in Continuous mode, a write to TOCV presets the counter to the value configured by TOCC[TOP] and continues down-counting. When the timeout counter is controlled by one of the FIFOs, an empty FIFO presets the counter to the value configured by TOCC[TOP]. Down-counting is started when the first FIFO element is stored. These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

TOS_W

Field TOS writer - Timeout select When operating in Continuous mode, a write to TOCV presets the counter to the value configured by TOCC[TOP] and continues down-counting. When the timeout counter is controlled by one of the FIFOs, an empty FIFO presets the counter to the value configured by TOCC[TOP]. Down-counting is started when the first FIFO element is stored. These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1.

W

Register TOCC writer