stm32_hal2/clocks/mod.rs
1//! This module contains clock configurations for various MCUs. They tend to be significantly
2//! different from one another, so we've feature-gated these files, rather than
3//! code within the files, to differentiate families. This documentation is built for H723, and will
4//! not be correct for other variants. For F series defaults, check out the [Default impl here](https://github.com/David-OConnor/stm32-hal/blob/main/src/clocks/f).
5//! [Check here for other H7 variants](https://github.com/David-OConnor/stm32-hal/blob/main/src/clocks/h7.rs) For other
6//! STM32 families, [look here](https://github.com/David-OConnor/stm32-hal/blob/main/src/clocks/baseline.rs).
7//!
8//! Alternatively, you can examine the `CLocks` structure to see which scalers are set, or generate docs locally
9//! for your variant.//!
10//!
11//! See STM32CubeIDE for an interactive editor that's very useful for seeing what
12//! settings are available, and validating them.
13//!
14//! See the Reference Manuals for non-interactive visualizations.
15
16cfg_if::cfg_if! {
17 if #[cfg(feature = "f")] {
18 mod f;
19 pub use f::*;
20 } else if #[cfg(any(feature = "l4", feature = "l5", feature = "g0", feature = "g4", feature = "wb", feature = "wl", feature = "c0"))] {
21 mod baseline;
22 pub use baseline::*;
23 }else if #[cfg(any(feature = "h5", feature = "h7"))] {
24 mod h;
25 pub use h::*;
26 }
27}
28
29// todo: Consider merging the modules into a single file: There's more similar than different.
30// todo: You have a good deal of DRY atm between modules.
31
32// Dat structures and functions that are shared between clock modules go here.
33
34// todo: Continue working through DRY between the clock modules.
35
36/// Speed out of limits.
37#[derive(Debug, Clone, Copy, Eq, PartialEq, defmt::Format)]
38pub enum RccError {
39 Speed,
40}
41
42// #[derive(Clone, Copy)]
43// #[repr(u8)]
44// pub enum ClocksValid {
45// Valid,
46// NotValid,
47// }