Module stm32_hal2::pac::mdma::ch::cr

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Expand description

This register is used to control the concerned channel.

Structs§

  • This register is used to control the concerned channel.
  • Register CR reader
  • Register CR writer

Type Aliases§

  • Field BEX reader - byte Endianness exchange
  • Field BEX writer - byte Endianness exchange
  • Field BRTIE reader - Block Repeat transfer interrupt enable This bit is set and cleared by software.
  • Field BRTIE writer - Block Repeat transfer interrupt enable This bit is set and cleared by software.
  • Field BTIE reader - Block Transfer interrupt enable This bit is set and cleared by software.
  • Field BTIE writer - Block Transfer interrupt enable This bit is set and cleared by software.
  • Field CTCIE reader - Channel Transfer Complete interrupt enable This bit is set and cleared by software.
  • Field CTCIE writer - Channel Transfer Complete interrupt enable This bit is set and cleared by software.
  • Field EN reader - channel enable
  • Field EN writer - channel enable
  • Field HEX reader - Half word Endianes exchange
  • Field HEX writer - Half word Endianes exchange
  • Field PL reader - Priority level These bits are set and cleared by software. These bits are protected and can be written only if EN is 0.
  • Field PL writer - Priority level These bits are set and cleared by software. These bits are protected and can be written only if EN is 0.
  • Field SWRQ writer - SW ReQuest Writing a 1 into this bit sets the CRQAx in MDMA_ISRy register, activating the request on Channel x Note: Either the whole CxCR register or the 8-bit/16-bit register @ Address offset: 0x4E + 0x40 chn may be used for SWRQ activation. In case of a SW request, acknowledge is not generated (neither HW signal, nor CxMAR write access).
  • Field TCIE reader - buffer Transfer Complete interrupt enable This bit is set and cleared by software.
  • Field TCIE writer - buffer Transfer Complete interrupt enable This bit is set and cleared by software.
  • Field TEIE reader - Transfer error interrupt enable This bit is set and cleared by software.
  • Field TEIE writer - Transfer error interrupt enable This bit is set and cleared by software.
  • Field WEX reader - Word Endianness exchange
  • Field WEX writer - Word Endianness exchange