Struct stm32_hal2::pac::exti::cpuimr3::R

pub struct R(/* private fields */);

Register CPUIMR3 reader

Implementations

impl R

pub fn mr64(&self) -> BitReaderRaw<MR64_A>

Bit 0 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr65(&self) -> BitReaderRaw<MR64_A>

Bit 1 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr66(&self) -> BitReaderRaw<MR64_A>

Bit 2 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr67(&self) -> BitReaderRaw<MR64_A>

Bit 3 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr68(&self) -> BitReaderRaw<MR64_A>

Bit 4 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr69(&self) -> BitReaderRaw<MR64_A>

Bit 5 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr70(&self) -> BitReaderRaw<MR64_A>

Bit 6 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr71(&self) -> BitReaderRaw<MR64_A>

Bit 7 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr72(&self) -> BitReaderRaw<MR64_A>

Bit 8 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr73(&self) -> BitReaderRaw<MR64_A>

Bit 9 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr74(&self) -> BitReaderRaw<MR64_A>

Bit 10 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr75(&self) -> BitReaderRaw<MR64_A>

Bit 11 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr76(&self) -> BitReaderRaw<MR64_A>

Bit 12 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr77(&self) -> BitReaderRaw<MR64_A>

Bit 13 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr78(&self) -> BitReaderRaw<MR64_A>

Bit 14 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr79(&self) -> BitReaderRaw<MR64_A>

Bit 15 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr80(&self) -> BitReaderRaw<MR64_A>

Bit 16 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr82(&self) -> BitReaderRaw<MR64_A>

Bit 18 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr84(&self) -> BitReaderRaw<MR64_A>

Bit 20 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr85(&self) -> BitReaderRaw<MR64_A>

Bit 21 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr86(&self) -> BitReaderRaw<MR64_A>

Bit 22 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr87(&self) -> BitReaderRaw<MR64_A>

Bit 23 - CPU Interrupt Mask on Direct Event input x+64

pub fn mr88(&self) -> BitReaderRaw<MR64_A>

Bit 24 - CPU Interrupt Mask on Direct Event input x+64

Methods from Deref<Target = R<CPUIMR3_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CPUIMR3_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CPUIMR3_SPEC>> for R

fn from(reader: R<CPUIMR3_SPEC>) -> R

Converts to this type from the input type.